HS300x Datasheet

© 2020 Renesas Electronics Corporation

11

April 22, 2020

6.3 I2C Communication

The sensor transmission is initiated when the master sends a 0 START bit (S). The transmission is terminated when the master sends a 1 STOP

bit (P). These bits are only transmitted while the SCL line is HIGH (see Figure 155 for waveforms).

Once the START condition has been set, the SCL line is toggled at the prescribed data rate, clocking subsequent data transfers. Data on the

SDA line is always sampled on the rising edge of the SCL line and must remain stable while SCL is HIGH to prevent false START or STOP

conditions.

Figure 15. START and STOP Condition Waveform

START Condition

STOP Condition

STOP

SDA

SCL

SDA

SCL

START

After the START bit, the master device sends the 7-bit slave address (see section 6.2) to the HS300x, followed by the read/write bit, which

indicates the transfer direction of any subsequent data. This bit is set to 1 to indicate a read from slave to master or set to 0 to indicate a write

from master to slave.

All transfers consist of 8 bits and a response bit: 0 for Acknowledge (ACK) or 1 for Not Acknowledge (NACK). After the ACK is received, another

data byte can be transferred or the communication can be stopped with a STOP bit.

6.4 Measurement Mode

The HS300x is factory-programmed to operate in Sleep Mode. In Sleep Mode, the sensor waits for commands from the master before taking

measurements. The digital core only performs conversions when it receives a Measurement Request command (MR); otherwise, it is always

powered down.

6.5 Measurement Requests (MR)

The MR command is required to wake up the HS300x from its Sleep Mode. Initiate the Measurement Request by sending the 7-bit slave address

followed by an eighth bit = 0 (WRITE).

A measurement cycle consists of a humidity and temperature conversion followed by the digital signal processor (DSP) correction calculations.

At the end of a measurement cycle, the digital output register will be updated before powering down.

The output is always scaled to 14 bits. The order of the bits is big-endian.

Figure 16. Measurement Request

S

Device Slave Address [6:0]

Slave Address Bit

(MSB first)

Start Condition

Stop Condition

Acknowledge (ACK)

Read/Write

(Example: Write = 0)

S

S

W

Wait for

Slave ACK

1

S

0 0

1

0

0

W

(0)

0

A

A