MCP2517FD datasheet(2/98 Pages) MICROCHIP

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MCP2517FD

DS20005688B-page 2

 2017-2018 Microchip Technology Inc.

1.0

DEVICE OVERVIEW

The

MCP2517FD

cost-effective

and

small-footprint CAN FD controller that can be easily

added to a microcontroller with an available SPI

interface. Therefore, a CAN FD channel can be easily

added to a microcontroller that is either lacking a CAN

FD peripheral, or that doesn’t have enough CAN FD

channels.

The MCP2517FD supports both, CAN frames in the

Classical format (CAN2.0B) and CAN Flexible Data

Rate (CAN FD) format, as specified in ISO 11898-

1:2015.

1.1

Block Diagram

Figure 1.1

shows

the

block

diagram

the

MCP2517FD. The MCP2517FD contains the following

main blocks:

• The CAN FD Controller module implements the

CAN FD protocol and contains the FIFOs, and Fil-

ters.

• The SPI interface is used to control the device by

accessing SFRs and RAM.

• The RAM controller arbitrates the RAM accesses

between the SPI and CAN FD Controller module.

• The Message RAM is used to store the data of the

Message Objects.

• The oscillator generates the CAN clock.

• The Internal LDO and POR circuit.

• The I/O control.

FIGURE 1-1:

MCP2517FD BLOCK DIAGRAM

Note 1:

This data sheet summarizes the features

of the MCP2517FD. It is not intended to

be a comprehensive reference source. To

complement the information in this data

sheet, refer to the related section of the

“MCP25xxFD Family Reference Manual”.

I/O

Message

RAM

TXCAN

RXCAN

INT

INT0/GPIO0/XSTBY

RAM

Controller

nCS

SCK

SDI

SDO

INT1/GPIO1

CAN FD

Controller

Module

CLKO/SOF

OSC1

OSC2

Oscillator

VDD

VSS

Filter

POR

Internal

LDO

SPI

Interface

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