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IS25LP256D-RJLA3 数据表(PDF) 101 Page - Integrated Silicon Solution, Inc

部件名 IS25LP256D-RJLA3
功能描述  SERIAL FLASH MEMORY WITH 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  174 Pages
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LP256D-RJLA3 数据表(HTML) 101 Page - Integrated Silicon Solution, Inc

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IS25LP256D
IS25WP256D
Integrated Silicon Solution, Inc.- www.issi.com
101
Rev A6
04/15/2019
8.30 CLEAR EXTENDED READ REGISTER OPERATION (CLERP, 82h)
A Clear Extended Read Register (CLERP) instruction clears PROT_E and P_ERR error bits in the Extended Read
Register
to “0” when the error bits are set to “1”. Once the error bits are set to “1”, they remains set to “1” until they
are cleared to “0” with a CLERP command.
Figure 8.67 Clear Extended Read Register Sequence In SPI Mode
Instruction = 82h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.68 Clear Extended Read Register Sequence In QPI Mode
82h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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