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IS25LP256D-RJLA3 数据表(PDF) 72 Page - Integrated Silicon Solution, Inc |
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IS25LP256D-RJLA3 数据表(HTML) 72 Page - Integrated Silicon Solution, Inc |
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72 / 174 page ![]() IS25LP256D IS25WP256D Integrated Silicon Solution, Inc.- www.issi.com 72 Rev A6 04/15/2019 Figure 8.20 Fast Read Quad I/O Sequence In QPI Mode (EBh [EXTADD=1] or ECh, 4-byte address) EBh/ECh CE# IO[3:0] 6 Dummy Cycles 4-byte Address 0 1 2 3 4 5 6 7 8 9 ... 11 ... 15 16 17 Mode 3 Mode 0 31:28 7:4 3:0 7:4 3:0 Data 1 27:24 23:20 18:16 15:12 11:8 ... tV Instruction Mode Bits 7:4 3:0 10 SCK Notes: 1. If the mode bits=AXh (where X is don’t care), it can execute the AX read mode (without command). When the mode bits are different from AXh, the device exits the AX read operation. 2. Number of dummy cycles depends on Read Parameter setting. Detailed information in Table 6.11 Read Dummy Cycles. |
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