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IS25LP256D-RJLA3 数据表(PDF) 77 Page - Integrated Silicon Solution, Inc

部件名 IS25LP256D-RJLA3
功能描述  SERIAL FLASH MEMORY WITH 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  174 Pages
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LP256D-RJLA3 数据表(HTML) 77 Page - Integrated Silicon Solution, Inc

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IS25LP256D
IS25WP256D
Integrated Silicon Solution, Inc.- www.issi.com
77
Rev A6
04/15/2019
Figure 8.26 Quad Input Page Program operation (32h/38h [EXTADD=1] or 34h/3Eh, 4-byte address)
31
4-byte Address
30
39
40
41
42
43
Instruction = 32h/38h/34h/3Eh
CE #
SCK
4
0
4
0
High Impedance
...
0
0
1
2
3
4
5
6
7
8
9
Mode 3
Mode 0
IO0
IO1
5
1
5
1
6
2
6
2
7
3
7
3
Data In 2
IO2
IO3
...
Data In 1
...
...
...
...
...
8.12 ERASE OPERATION
The memory array of the device is organized into uniform 4 Kbyte sectors or 32/64 Kbyte uniform blocks (a block
consists of eight/sixteen adjacent sectors respectively).
Before a byte is reprogrammed, the sector or block that contains the byte must be era
sed (erasing sets bits to “1”).
In order to erase the device, there are three erase instructions available: Sector Erase (SER), Block Erase (BER),
and Chip Erase (CER). A sector erase operation allows any individual sector to be erased without affecting the
data in other sectors. A block erase operation erases any individual block. A chip erase operation erases the whole
memory array of a device. A sector erase, block erase, or chip erase operation can be executed prior to any
programming operation.



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