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IS25LP256D-RGLA3 数据表(PDF) 140 Page - Integrated Silicon Solution, Inc

部件名 IS25LP256D-RGLA3
功能描述  SERIAL FLASH MEMORY WITH 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  174 Pages
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LP256D-RGLA3 数据表(HTML) 140 Page - Integrated Silicon Solution, Inc

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IS25LP256D
IS25WP256D
Integrated Silicon Solution, Inc.- www.issi.com
140
Rev A6
04/15/2019
8.50 EXIT 4-BYTE ADDRESS MODE OPERATION (EX4B, 29h)
In order to be backward compatible, the Exit 4-byte Address Mode instruction allows 24bit address (A23-A0) to be
used to access the memory array up to 128Mb. The Bank Address Register must be used to access the memory
array beyond 128Mb. To execute EX4B operation, the host drives CE# low, sends the instruction code and then
drives CE# high.
Note: The EX4B instruction will reset the Bit 7 (EXTADD) of the volatile Bank
Address Register to “0” ”, but will not
change the non-volatile Bank Address Register.
Figure 8.114 Exit 4-byte Address Mode Sequence In SPI Mode
Instruction = 29h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.115 Exit 4-byte Address Mode Sequence In QPI Mode
29h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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