IS25LP256D-RGLA3 datasheet(32/174 Pages) ISSI

32 / 174 page

IS25LP256D

IS25WP256D

Integrated Silicon Solution, Inc.- www.issi.com

Rev A6

04/15/2019

Figure 7.1 Advanced

Sector/Block Protection

DYB 0

DYB 1

DYB 2

DYB 3

Sector/Block 0

Sector/Block 1

Sector/Block 2

Sector/Block 3

PPB 0

PPB 1

PPB 2

PPB 3

DYB N-3

DYB N-2

DYB N-1

DYB N

Sector/Block N-3

Sector/Block N-2

Sector/Block N-1

Sector/Block N

PPB N-3

PPB N-2

PPB N-1

PPB N

0 = Locked

64-bit Password

(OTP)

Password Protection

Mode (ASPR[2]=0

Persistent Protection

Mode (ASPR[1]=0

ASP Register Bits (OTP)

PPB

Memory Array

DYB

1. 0 = Sector/Block Protected

1 = Sector/Block Unprotected (default)

DYBs are volatile and defaults to “1”

after power-up

1. 0 = Sector/Block Protected

1 = Sector/Block Unprotected

2. PPB bits are programmed individually,

but erased collectively

The bit defaults to “1” (Persistent Protection mode)

or “0” (Password Protection mode) upon reset.

“0” locks all PPB bits to their current state.

3. Password Protection mode requires a password to

set PPB Lock bit to “1” to enable program or

erase of PPB bits.

4. Persistent Protection mode only allows PPB Lock

bit to be cleared to “0” to prevent program or erase

PPB bits. Power off or hardware reset is required to

set PPB Lock bit to “1”.

1 = Unocked

PPB Lock Bit

(Volatile)

Note:

1. 256M: N = 541 = 32 (32 Top 4K sectors or 32 Bottom 4K sectors) + 510 (510 64K blocks) - 1

IS25LP256D-RGLA3 数据表(PDF) 32 Page - Integrated Silicon Solution, Inc

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