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ADC32RF83 数据表(PDF) 22 Page - Texas Instruments

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部件名 ADC32RF83
功能描述  ADC32RF8x Dual-Channel, 3-GSPS Telecom Receiver and Feedback Devices
PDF  138 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

ADC32RF83 数据表(HTML) 22 Page - Texas Instruments

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Differential Clock Amplitude (Vpp)
0.5
0.9
1.3
1.7
2.1
2.5
51
54
52
56
53
58
54
60
55
62
56
64
D037
SNR
SFDR
Input Clock Duty Cycle (%)
40
45
50
55
60
55
62.5
56
65
57
67.5
58
70
59
72.5
60
75
D039
D038
SNR
SFDR
Differential Clock Amplitude (Vpp)
0.5
0.9
1.3
1.7
2.1
2.5
56
61
57
62
58
63
59
64
60
65
61
66
62
67
D036
SNR
SFDR
Amplitude (dBFS)
-70
-60
-50
-40
-30
-20
-10
0
48
0
50
10
52
20
54
30
56
40
58
50
60
60
62
70
64
80
66
90
68
100
70
110
72
120
D035
SNR (dBFS)
SFDR (dBFS)
SFDR (dBc)
Amplitude (dBFS)
-70
-60
-50
-40
-30
-20
-10
0
48
0
50
10
52
20
54
30
56
40
58
50
60
60
62
70
64
80
66
90
68
100
70
110
72
120
D034
SNR (dBFS)
SFDR (dBFS)
SFDR (dBc)
HD2 (dBFS)
0
5
10
15
20
25
D033
Temp = -40°C
Temp = 25°C
Temp = 85°C
22
ADC32RF80, ADC32RF83
SBAS774A – MAY 2016 – REVISED DECEMBER 2016
www.ti.com
Product Folder Links: ADC32RF80 ADC32RF83
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Typical Characteristics (continued)
typical values are specified at an ambient temperature of 25°C; minimum and maximum values are specified over an ambient
temperature range of –40°C to +85°C; and ADC sampling rate = 2949.12 MSPS, DDC bypassed performance, 50% clock
duty cycle, AVDD19 = 1.9 V, AVDD = DVDD = 1.15 V, –2-dBFS differential input, and 0-dB digital gain (unless otherwise
noted)
fIN = 1.78 GHz
Figure 57. HD2 Histogram at AVDD19 = 2.0 V
fIN = 1.78 GHz, AIN = –2 dBFS
Figure 58. Performance vs Amplitude
fIN = 3.5 GHz, AIN = –3 dBFS with 2-dB digital gain
Figure 59. Performance vs Amplitude
fIN = 1.78 GHz, AIN = –2 dBFS
Figure 60. Performance vs Clock Amplitude
fIN = 3.5 GHz, AIN = –3 dBFS
Figure 61. Performance vs Clock Amplitude
fIN = 1.78 GHz, AIN = –2 dBFS
Figure 62. Performance vs Clock Duty Cycle



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