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STSPIN820 数据表(PDF) 6 Page - STMicroelectronics |
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STSPIN820 数据表(HTML) 6 Page - STMicroelectronics |
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6 / 29 page ![]() Electrical data STSPIN820 6/29 DocID031065 Rev 2 2 Electrical data 2.1 Absolute maximum ratings 2.2 Recommended operating conditions 2.3 Thermal data Table 1. Absolute maximum ratings Symbol Parameter Test condition Value Unit VS Supply voltage - -0.3 to 48 V VIN Logic input voltage - -0.3 to 5.5 V VOUT,diff Differential voltage between VS, OUTx1, OUTx2 and SENSEx pins - up to 48 V VSENSE Sense pins voltage - -2 to 2 V VREF Reference voltage input - -0.3 to 2 V IOUT,RMS Continuous power stage output current (each full-bridge) - 1.5 Arms Tj Junction temperature - -40 to 150 °C TSTG Storage temperature - -55 to 150 °C Table 2. Recommended operating conditions Symbol Parameter Min. Typ. Max. Unit VS Supply voltage 7 - 45 V VIN Logic input voltage - - 5 V VSENSE Sense pins voltage -1 - +1 V VREF Reference voltage input 0.1 - 1 V Table 3. Thermal data Symbol Parameter Conditions Value Unit RthJA Junction to ambient thermal resistance Natural convection, according to JESD51-2A(1) 36.5 °C/W RthJCtop Junction to case thermal resistance (top side) Cold plate on top package, according to JESD51-12(1) 27.6 °C/W RthJCbot Junction to case thermal resistance (bottom side) Cold plate on exposed pad, according to JESD51-12(1) 5.9 °C/W RthJB Junction to board thermal resistance according to JESD51-8(1) 13.6 °C/W JT Junction to top characterization According to JESD51-2A(1) 1°C/W JB Junction to board characterization According to JESD51-2A(1) 13.7 °C/W 1. Simulated on a 76.2 x 114.3 x 1.6 mm, with vias underneath the component, the 2s2p board as per the standard JEDEC (JESD51-7) in natural convection. |
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