Revision 1.0

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nRF24AP2-USB Product Specification

11

Reference circuitry

To ensure optimal performance it is essential that you follow the schematics- and layout references

closely. Especially in the case of the antenna matching circuitry (components between device pins ANT1,

ANT2, VDD_PA and the antenna), any changes in the layout can change the behavior, resulting in

degradation of RF performance or a need to change component values. All the reference circuits are

designed for use with a 50Ω single end antenna.

11.1

PCB guidelines

A well designed PCB is necessary to achieve good RF performance. A poor layout can lead to loss in

performance or functionality. A fully qualified RF-layout for the nRF24AP2 and its surrounding compo-

A PCB with a minimum of two layers including a ground plane is recommended for optimal performance.

The nRF24AP2 DC supply voltage should be decoupled as close as possible to the VDD pins with high

capacitor values. The nRF24AP2 supply voltage should be filtered and routed separately from the supply

voltages of any digital circuitry.

Long power supply lines on the PCB should be avoided. All device grounds, VDD connections and VDD

bypass capacitors must be connected as close as possible to the nRF24AP2 IC. For a PCB with a topside

RF ground plane, the VSS pins should be connected directly to the ground plane. For a PCB with a bottom

ground plane, the best technique is to have Via holes as close as possible to the VSS pads. A minimum of

one Via hole should be used for each VSS pin.

Full-swing digital data or control signals should not be routed close to the crystal or the power supply lines.