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IIS3DHHC 数据表(PDF) 13 Page - STMicroelectronics |
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IIS3DHHC 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 30 page ![]() 5.3 Continuous mode Continuous mode (FIFO_CTRL (2Eh) (FMODE[2:0] = 110) provides a continuous FIFO update: when 32 unread samples are stored in memory, as new data arrives the oldest data is discarded and overwritten by the newer. A FIFO threshold flag FIFO_SRC (2Fh)(FTH) is asserted when the number of unread samples in FIFO is greater than or equal to FIFO_CTRL (2Eh)(FTH4:0). It is possible to route FIFO_SRC (2Fh)(FTH) to the INT1 pin by writing the INT1_FTH bit to ‘1’ in register INT1_CTRL (21h) or to the INT2 pin by writing the INT2_FTH bit to ‘1’ in register INT2_CTRL (22h). A full-flag interrupt can be enabled (INT1_CTRL (21h) (INT_ FSS5)= '1' or INT2_CTRL (22h) (INT_ FSS5) = '1') when the FIFO becomes saturated and in order to read the contents all at once. If an overrun occurs, the oldest sample in FIFO is overwritten and the OVRN flag in FIFO_SRC (2Fh) is asserted. In order to empty the FIFO before it is full, it is also possible to pull from FIFO the number of unread samples available in FIFO_SRC (2Fh) (FSS[5:0]). Figure 11. Continuous mode x0 y0 z0 x1 y1 z1 x2 y2 z2 x31 y31 z31 xi,yi,zi x30 y30 z30 IIS3DHHC Continuous mode DS12292 - Rev 3 page 13/30 |
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