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ADAR2004

Data Sheet

Rev. 0 | Page 18 of 37

APPLICATIONS INFORMATION

SPI CONTROL

The ADAR2004 is designed to operate as part of a larger array.

The built in state machines help to ease the control of many

chips in parallel and to ensure that the fastest switching speeds

are achieved. However, it is possible to operate every aspect of

the ADAR2004 using the SPI port alone. When the state machines

are disabled by setting MULT_SEQ_EN (Register 0x019, Bit 7)

and RX_SEQ_EN (Register 0x018, Bit 7) low, the multiplier/filter

and receiver blocks respond to the SPI controlled registers

(Register 0x02B to Register 0x02F), rather than stepping

through the programmed states.

MULT_SPI (Register 0x02F) controls the multiplier/filter block

when in SPI mode and has all the same controls as a typical

multiplier/filter mode.

when in SPI mode and have all the same controls as a typical

receiver mode, as well as individual enables for the LNAs, mixers,

and IF VGAs. Note that when the ADAR2004 receiver block is

in SPI mode, the channel enables do not turn on the desired

channel unless each piece of the receiver signal chain (LNA,

mixer, IF VGA) is enabled as well, which contrasts with the

sequencer modes, where a channel enable turns on the entire

channel. The sequencer does not have access to the individual

enables.

Operating the ADAR2004 in this manner can be thought of as a

manual, rather than an automatic, approach. With the sequencers

disabled, any changes to the configuration of the chip must be

made through an SPI write, because pulsing any of the sequencer

control pins has no effect.

STATE MACHINE MODES vs. STATES

Both the multiplier/filter state machine and the receiver state

machine have 16 modes available to set the configuration of

their respective subcircuitry. The sequencers also have 16 states

available to cycle through.

Within each mode of the multiplier/filter state machine, the

user can define the following:

•

The enabled status of the RF input buffer (on or off, one bit).

•

The sleep, ready, or active state of each 4× multiplier band

(two bits for each band, six bits in total). The two bits

control the ready and active status, and if neither bit is

high, the multiplier band is set to sleep. Both bits must be

high to be fully active.

•

The BPF status (on or off, 1 bit for all bands).

Within each mode of the receiver state machine, the user can

define the following:

•

The enabled status of each receive channel (one bit for

each band, four bits in total). Each bit enables the entire

channel, including the respective LNA, mixer, and IF VGA.

•

The enabled status of the first 1:2 signal splitter (on or off,

one bit).

•

The enabled status of the 1:2 signal splitter feeding the

mixers on Channel 1 and Channel 2 (on or off, one bit).

•

The enabled status of the 1:2 signal splitter feeding the

mixers on Channel 3 and Channel 4 (on or off, one bit).

•

The gain of each channel (four bits for each, 16 total).

Each multiplier/filter state is used to select an operating mode.

Each state bit field contains four bits, allowing selection of any

mode between 0 and 15 (Register 0x070 to Register 0x07F).

There are 16 multiplier/filter states available (Register 0x022 to

enabled and the sequencer depth is set, the multiplier/filter

state machine cycles through the states in order, up to the

defined state machine depth.

Similarly, each receiver state is used to select an operating mode.

Each state bit field has four bits, allowing the selection of any

mode between 0 and 15 (Register 0x040 to Register 0x06F). There

are 16 receiver states available (Register 0x01A to Register 0x021).

When the receiver state machine is enabled and the sequencer

depth is set, the receiver state machine cycles through the states

in order, up to the defined state machine depth.

Figure 42 shows how the state machine pointer moves through

a loop. In this diagram, n is the total number of states inside the

loop. Because the sequencer depth bit field is 0 indexed, n is equal

to one more than the value in the sequencer depth bit field.

n = MULT_STATES + 1

where:

n = 1 to 16.

MULT_STATES is the multiplier sequencer depth.

n = RX_STATES + 1

where:

n = 1 to 16.

RX_STATES is the receiver sequence depth.

RESET

ADVANCE

Figure 42. State Machine Position Loop

STATE MACHINE SETUP

Both state machines in the ADAR2004 have configuration

registers that control various aspects of the state machine.

For the multiplier/filter sequencer, this register is Register 0x019

and contains the following bits:

•

Bits 0 to Bit 3: MULT_STATES. These bits set the number

of states in the loop (see Figure 42).

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