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MAS3506D 数据表(PDF) 2 Page - Micronas |
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MAS3506D 数据表(HTML) 2 Page - Micronas |
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2 / 52 page ![]() MAS 3506D PRELIMINARY DATA SHEET 2 Micronas Contents Page Section Title 4 1. Introduction 4 1.1. Features of the MAS 3506D 4 1.2. System Overview 7 2. Functional Description of the MAS 3506D 72.1. Overview 7 2.2. Firmware (Internal Program ROM) 7 2.2.1. Broadcast Channel Synchronization 8 2.2.1.1. Broadcast Channel Timing 8 2.2.1.2. Buffer-Controlled Loop 8 2.2.2. Broadcast Channel Demultiplexing 8 2.2.3. MPEG Audio Decoding 8 2.2.4. Baseband Processing 9 2.3. Clock Management 9 2.4. Power Supply Concept 9 2.4.1. Internal Voltage Monitor 9 2.4.2. DC/DC Converter 9 2.4.3. Stand-by Functions 9 2.4.4. Start-up Sequence 10 2.5. Interfaces 10 2.5.1. Broadcast Channel (BC) Input Interface 11 2.5.2. Parallel Input Output Interface (PIO) 12 2.5.3. Audio Output Interface 13 3. Controlling 13 3.1. I2C-Access 13 3.1.1. Device Address 13 3.1.2. I2C Registers and Subaddresses 13 3.1.3. Conventions for the Command Description 14 3.2. I2C Control Register (Subaddress 6Ahex) 15 3.3. I2C-Data Register (Subaddresses 68hex and 69hex) and the MAS 3506D DSP-Command Syntax 16 3.3.1. Data Formats 16 3.3.2. Run and Freeze (Codes 0hex to 1hex) 16 3.3.3. Select Service Component (Code 5hex) 16 3.3.4. Read Ancillary MPEG Data (Code 6hex) 18 3.3.5. Read SCH-Data (Code 8hex) 18 3.3.6. Write Register (Code 9hex) 19 3.3.7. Write Memory (Codes Ahex and Bhex) 19 3.3.8. Read Register (Code Dhex) 19 3.3.9. Read Memory (Codes Ehex and Fhex) 19 3.3.10. Default Read 20 3.4. Control Registers 23 3.5. Control and Status Memory 28 3.5.1. Volume Matrix |
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