MAS3529F datasheet(3/92 Pages) MICRONAS

3 / 92 page

Contents, continued

Page

Section

Title

Micronas

June 30, 2004; 6251-505-1DS

DATA SHEET

MAS 35x9F

2.11.3.

Reset Signal Specification

2.11.4.

Control of the Signal Processing

2.11.5.

Start-up of the Audio Codec

2.11.6.

Power-Down

Controlling

3.1.

I2C Interface

3.1.1.

Device Address

3.1.2.

I2C Registers and Subaddresses

3.1.3.

Naming Convention

3.2.

Direct Configuration Registers

3.2.1.

Write Direct Configuration Registers

3.2.2.

Read Direct Configuration Register

3.3.

DSP Core

3.3.1.

Access Protocol

3.3.2.

Data Formats

3.3.2.1.

Run and Freeze (Codes 0hex to 3hex)

3.3.2.2.

Read Register (Code Ahex)

3.3.2.3.

Write Register (Code Bhex)

3.3.2.4.

Read Memory (Codes Chex and Dhex)

3.3.2.5.

Short Read Memory (Codes C4hex and D4hex)

3.3.2.6.

Write Memory (Codes Ehex and Fhex)

3.3.2.7.

Short Write Memory (Codes E4hex and F4hex)

3.3.2.8.

Clear SYNC Signal (Code 5hex)

3.3.2.9.

Default Read

3.3.2.10.

Fast Program Download (Code 6hex)

3.3.2.11.

Serial Program Download

3.3.2.12.

Read IC Version (Code 7hex)

3.3.3.

List of DSP Registers

3.3.4.

List of DSP Memory Cells

3.3.4.1.

Application Selection and Application Running

3.3.4.2.

Application Specific Control

3.3.5.

Ancillary Data

3.3.6.

Reading of the Memory Cells “Number of Bits in Ancillary Data” and “Ancillary Data”

3.3.7.

DSP Volume Control

3.3.8.

Explanation of the G.729A Data Format

3.4.

Audio Codec Access Protocol

3.4.1.

Write Codec Register

3.4.2.

Read Codec Register

3.4.3.

Codec Registers

3.4.4.

Basic MB Configuration

MAS3529F 数据表(PDF) 3 Page - Micronas

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