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MAS3529F 数据表(PDF) 23 Page - Micronas

部件名 MAS3529F
功能描述  MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec
PDF  92 Pages
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制造商  MICRONAS [Micronas]
网页  http://www.micronas.com
标志 MICRONAS - Micronas

MAS3529F 数据表(HTML) 23 Page - Micronas

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DATA SHEET
MAS 35x9F
Micronas
June 30, 2004; 6251-505-1DS
23
3.2.1. Write Direct Configuration Registers
The write protocol for the direct configuration registers
only consists of device address, subaddress and one
16-bit data word.
3.2.2. Read Direct Configuration Register
To check the PUP1 and PUP2 power-up flags, it is
necessary to read back the content of the direct config-
uration registers.
Fig. 3–1: Example of an I2C bus protocol for the MAS 35x9F (MSB first; data must be stable while clock is high)
Table 3–2: I2C subaddresses
Sub-
address
(hex)
I2C-
Register
Name
Function
Direct Configuration
6A
CONTROL
Controller writes to
MAS 35x9F CONTROL
register
76
DCCF
Controller writes to first
DC/DC configuration reg-
ister
77
DCFR
Controller writes to
second DC/DC configura-
tion register
DSP Core Access
68
data_write
Controller writes to
MAS 35x9F DSP
69
data_read
Controller reads from
MAS 35x9F DSP
Codec Access
6C
codec_write
Controller writes to
MAS 35x9F codec regis-
ter
6D
codec_read
Controller reads from
MAS 35x9F codec regis-
ter
SDW
subaddr.
WA
P
d3,d2
d1,d0
A
A
A
SDW
subaddr.
S
DR
P
d3,d2
A
N
WA
A
WA
d1,d0
high byte data
low byte data
AP
Example: I2C write access
SDA
SCL
1
0
S
P
DR
Example: I2C read access
DW
subaddress
S
DW
subaddress
high byte data
low byte data
P
N
W = Wait
A = Acknowledge (Ack)
N = Not Acknowledge (NAK)
S = Start
P = Stop
S
S
A
W
A
W
A
A
A
W
A
A
W
W



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