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ST7LITE30 数据表(PDF) 10 Page - STMicroelectronics |
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ST7LITE30 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 167 page  ST7LITE3 10/167 Legend: x=undefined, R/W=read/write Notes: 1. The contents of the I/O port DR registers are readable only in output configuration. In input configura- tion, the values of the I/O pins are returned instead of the DR register contents. 2. The bits associated with unavailable pins must always keep their reset value. 3. For a description of the DM registers, see the ST7 ICC Reference Manual. 0031h 0032h 0033h SPI SPIDR SPICR SPICSR SPI Data I/O Register SPI Control Register SPI Control Status Register xxh 0xh 00h R/W R/W R/W 0034h 0035h 0036h ADC ADCCSR ADCDRH ADCDRL A/D Control Status Register A/D Data Register High A/D control and Data Register Low 00h xxh x0h R/W Read Only R/W 0037h ITC EICR External Interrupt Control Register 00h R/W 0038h MCC MCCSR Main Clock Control/Status Register 00h R/W 0039h 003Ah Clock and Reset RCCR SICSR RC oscillator Control Register System Integrity Control/Status Register FFh 0000 0XX0h R/W R/W 003Bh Reserved area (1 byte) 003Ch ITC EISR External Interrupt Selection Register 00h R/W 003Dh to 003Fh Reserved area (3 bytes) 0040h 0041h 0042h 0043h 0044h 0045h 0046h 0047h LINSCI (LIN Mas- ter/Slave) SCISR SCIDR SCIBRR SCICR1 SCICR2 SCICR3 SCIERPR SCIETPR SCI Status Register SCI Data Register SCI Baud Rate Register SCI Control Register 1 SCI Control Register 2 SCI Control Register 3 SCI Extended Receive Prescaler Register SCI Extended Transmit Prescaler Register C0h xxh 00xx xxxxb xxh 00h 00h 00h 00h Read Only R/W R/W R/W R/W R/W R/W R/W 0048h Reserved area (1 byte) 0049h 004Ah AWU AWUPR AWUCSR AWU Prescaler Register AWU Control/Status Register FFh 00h R/W R/W 004Bh 004Ch 004Dh 004Eh 004Fh 0050h DM3) DMCR DMSR DMBK1H DMBK1L DMBK2H DMBK2L DM Control Register DM Status Register DM Breakpoint Register 1 High DM Breakpoint Register 1 Low DM Breakpoint Register 2 High DM Breakpoint Register 2 Low 00h 00h 00h 00h 00h 00h R/W R/W R/W R/W R/W R/W 0051h to 007Fh Reserved area (47 bytes) Address Block Register Label Register Name Reset Status Remarks 1 |
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