| 数据搜索系统,热门电子元器件搜索 |
|
ST7LITE35 数据表(PDF) 61 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST7LITE35 数据表(HTML) 61 Page - STMicroelectronics |
|
61 / 167 page ![]() ST7LITE3 61/167 DUAL 12-BIT AUTORELOAD TIMER 3 (Cont’d) 11.2.3.3 Input Capture Mode The 12-bit ATICR register is used to latch the val- ue of the 12-bit free running upcounter CNTR1 af- ter a rising or falling edge is detected on the ATIC pin. When an input capture occurs, the ICF bit is set and the ATICR register contains the value of the free running upcounter. An IC interrupt is gen- erated if the ICIE bit is set. The ICF bit is reset by reading the ATICRH/ATICRL register when the ICF bit is set. The ATICR is a read only register and always contains the free running upcounter value which corresponds to the most recent input capture. Any further input capture is inhibited while the ICF bit is set. Figure 41. Block Diagram of Input Capture Mode Figure 42. Input Capture timing diagram ATCSR CK0 CK1 ICIE ICF 12-BIT AUTORELOAD REGISTER 12-BIT UPCOUNTER1 fCPU ATIC 12-BIT INPUT CAPTURE REGISTER IC INTERRUPT REQUEST ATR1 ATICR CNTR1 (1 ms fLTIMER @ 8MHz) timebase OFF COUNTER1 t 01h fCOUNTER xxh 02h 03h 04h 05h 06h 07h 04h ATIC PIN ICF FLAG INTERRUPT 08h 09h 0Ah INTERRUPT ATICR READ 09h 1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |