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LTC4367 数据表(PDF) 21 Page - Analog Devices |
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LTC4367 数据表(HTML) 21 Page - Analog Devices |
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21 / 30 page ![]() LTC7000/LTC7000-1 21 Rev. E For more information www.analog.com APPLICATIONS INFORMATION UVLO to 8.0V. The value of RVCCUV is calculated and rounded to the nearest standard value as follows: RVCCUV = 8.0V 70µA = 113kΩ The value of the current sense resistor, RSNS is calculated next. The LTC7000-1 has a fixed current sense thresh- old, ΔVTH, of 30mV typical and 22mV minimum. To pro- vide a minimum 3A load current, the minimum specified ΔVTH = 22mV should be used for the RSNS calculation below: RSNS = 22mV 3A = 7.3mΩ The closest standard value is 7mΩ. The power dissipation of RSNS is 63mW so choose a power rating of greater than 0.25W to provide adequate margin. The next item to check is to make sure the insertion loss specification is satisfied. The insertion loss is given by: PLOSS = ILOAD 2 • R DS(ON)(MAX) + RSNS ( ) = 3A 2 • 0.043Ω + 0.007Ω ( ) = 0.45W Which meets the design specification of less than 0.5W. The fast output slew rate specification of 1V/µs into a 1µF load can be met by placing a resistor, RG, in series with the TGUP pin to the MOSFET gate, as well as connecting TGDN and a capacitor, CG, to ground on the MOSFET gate. The values of RG and TG can be calculated from the following expression: RG • CG ≅ 0.7 • 12V 1V / µs = 8.4µs CG needs to have a voltage rating as high as the BVDSS of the MOSFET. A good choice for CG is the AVX 06032C471KAT2A which has a value of 470pF and a volt- age rating of 200V. RG is then calculated to be 17.8kΩ. The bootstrap capacitor CB can be calculated from the gate charge as specified in the MOSFET data sheet and CG as follows: CB > QG 1V + 10 • CG = 30nC 1V + 10 • 470pF ≅ 0.33nF. 100nF will be used. To meet the short-circuit specification, the TIMER pin should be connected to VCC to enable immediate turn-off (approximately 70ns) of the MOSFET in the case of an overcurrent condition. If an overcurrent condition turns off the MOSFET, it will not turn back on until the INP pin has cycled low then back high. The complete circuit is shown in Figure 15. Figure 15. Design Example 0.1µF CG 470pF 200V 1µF 1µF SNS+ SNS– VIN VCC TIMER FAULT INP VCCUV 17.8k 7000 F15 LTC7000-1 0.007 IRF7815TRPBF LOAD 8V TO 135V 3A CONTINUOUS MODE VIN 8V TO 135V 113k GND 10 100 TGUP TGDN BST TS Turn–On Transient VIN = 135V 50µs/DIV VINP 5V/DIV VLOAD 50V/DIV IDMOSFET 1A/DIV 7000 F15b |
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