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L99LD02 数据表(PDF) 36 Page - STMicroelectronics |
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L99LD02 数据表(HTML) 36 Page - STMicroelectronics |
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36 / 66 page ![]() Serial peripheral interface (ST SPI standard) L99LD02 36/66 DS12448 Rev 3 a stuck-at-GND error is detected, the communication will be rejected and the SPIE will be set in the next communication cycle. SDI stuck at HIGH As a command with all data bits set to ‘1’ and OpCode ‘11’ on address b’111111 cannot be distinguished from an SDI stuck-at-HIGH error, this command is not allowed. In case a stuck-at-HIGH error is detected, the communication will be rejected and the SPIE will be set in the next communication cycle. SDO stuck SDO stuck-at-GND and stuck-at-HIGH errors have to be detected by the SPI master. As the definition of the GSB guarantees at least one bit toggle, a GSB with all bits set to ‘0’ or with all bits set to ‘1’ can be considered as an SDO stuck-at error. 5.5 Implementation remarks 5.5.1 Register change during communication From an implementation point of view, it is guaranteed that no register change gets lost during communication. In case a register value was changed during a communication, it will be reported with the next communication frame. 5.5.2 GSB and payload inconsistency Due to the internal implementation strategy, it may occur that data reported in the GSB does not match data reported in the payload in case the data was changed during GSB shift out. In this case, the payload data is the status quo, as it was loaded later into the SPI shift register. 5.6 Timings All SPI related timings are defined in Section 6.4.4: SPI bus (CSN, SCK, SDI, SDO). 5.7 Register description 5.7.1 Control Register CR#1: Control Register 1 Address: 0x01h Type: R/W 23 22 21 20 19 18 17 16 15 14 13 12 11 10 98765432 10 Unused |
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