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STM32L552CC 数据表(PDF) 64 Page - STMicroelectronics

部件名 STM32L552CC
功能描述  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 165 DMIPS, up to 512 KB Flash memory, 256 KB SRAM, SMPS
PDF  340 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32L552CC 数据表(HTML) 64 Page - STMicroelectronics

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Functional overview
STM32L552xx
64/340
DS12737 Rev 6
3.24
Comparators (COMP)
The devices embed two rail-to-rail comparators with programmable reference voltage
(internal or external), hysteresis and speed (low speed for low-power) and with selectable
output polarity.
The reference voltage can be one of the following:
External I/O
DAC output channels
Internal reference voltage or submultiple (1/4, 1/2, 3/4).
All comparators can wake up from Stop mode, generate interrupts and breaks for the timers
and can also be combined into a window comparator.
3.25
Operational amplifier (OPAMP)
The devices embed two operational amplifiers with external or internal follower routing and
PGA capability.
The operational amplifier features:
Low input bias current
Low offset voltage
Low-power mode
Rail-to-rail input
3.26
Digital filter for sigma-delta modulators (DFSDM)
The devices embed one DFSDM with four digital filters modules and eight external input
serial channels (transceivers) or alternately eight internal parallel inputs support.
The DFSDM peripheral is dedicated to interface the external Σ∆ modulators to the
microcontroller and then to perform digital filtering of the received data streams (which
represent analog value on Σ∆ modulators inputs).
The DFSDM can also interface the PDM (pulse density modulation) microphones and
perform PDM to PCM conversion and filtering in hardware. The DFSDM features optional
parallel data stream inputs from microcontrollers memory (through DMA/CPU transfers into
DFSDM).
The DFSDM transceivers support several serial interface formats (to support various Σ∆
modulators) and the DFSDM digital filter modules perform digital processing according to
the user’s selected filter parameters with up to 24-bit final ADC resolution.



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