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STM32L412R8Y6TR 数据表(PDF) 15 Page - STMicroelectronics |
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STM32L412R8Y6TR 数据表(HTML) 15 Page - STMicroelectronics |
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15 / 192 page  DS12469 Rev 8 15/192 STM32L412xx Description 49 Figure 1. STM32L412xx block diagram Note: AF: alternate function on I/O pins. MSv45999V2 Flash up to 128 KB GPIO PORT A EXT IT. WKUP 83 AF PA[15:0] TIM1 / PWM 3 compl. channels (TIM1_CH[1:3]N), 4 channels (TIM1_CH[1:4]), ETR, BKIN, BKIN2 as AF USART1 RX, TX, CK,CTS, RTS as AF SPI1 MOSI, MISO, SCK, NSS as AF WWDG RTC_TS OSC32_IN OSC32_OUT smcard IrDA 16b VBAT = 1.55 to 3.6 V JTAG & SW ARM Cortex-M4 80 MHz FPU NVIC ETM MPU DMA2 RNG BOR Supply supervision PVD, PVM Int reset XTAL 32 kHz MAN A G T RTC Standby interface IWDG @VBAT @ VDD @VDD AWU Reset & clock control Voltage regulator 3.3 to 1.2 V VDD Power management @ VDD RTC_TAMPx Backup register TIM15 2 channels, 1 compl. channel, BKIN as AF TIM6 TIM2 D-BUS SRAM2 8 KB SRAM1 32 KB I-BUS S-BUS DMA1 PB[15:0] PC[15:0] PD2 PH[1:0], PH[3] GPIO PORT B GPIO PORT C GPIO PORT D GPIO PORT H 16b TIM16 16b 1 channel, 1 compl. channel, BKIN as AF 16b 32b 4 channels, ETR as AF OSC_IN OSC_OUT XTAL OSC 4- 16MHz VREF+ US AR T 2 M B p s Temperature sensor @ VDDA Touch sensing controller 7 Groups of 4 channels max as AF RC HSI RC LSI PLL 1&2 MSI Quad SPI memory interface D0[3:0], D1[3:0], CLK0, CLK1 CS COMP1 INP, INM, OUT @ VDDA RTC_OUT CRC AHB2 80 MHz FIREWALL VREF Buffer @ VDDA @ VDD VDD = 1.71 to 3.6 V VSS VDDA, VSSA VDD, VSS, NRST VDDUSB TRACECLK TRACED[3:0] NJTRST, JTDI, JTCK/SWCLK JTDO/SWD, JTDO ITF HSI48 AHB/APB1 AHB/APB2 VOUT, VINM, VINP OpAmp1 @VDDA SCL, SDA, SMBA as AF I2C3/SMBUS SCL, SDA, SMBA as AF I2C2/SMBUS I2C1/SMBUS SCL, SDA, SMBA as AF MOSI, MISO, SCK, NSS as AF SPI2 USART3 RX, TX, CK, CTS, RTS as AF smcard IrDA USART2 RX, TX, CK, CTS, RTS as AF smcard IrDA CRS CRS_SYNC USB FS @ VDDUSB DP DM NOE LPUART1 RX, TX, CTS, RTS as AF LPTIM1 IN1, IN2, OUT, ETR as AF LPTIM2 IN1, OUT, ETR as AF ADC2 ADC1 16 external analog inputs 16 external analog inputs |
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