STM32L412R8I3PTR datasheet(79/192 Pages) STMICROELECTRONICS

79 / 192 page

DS12469 Rev 8

79/192

STM32L412xx

Electrical characteristics

164

6.3.2

Operating conditions at power-up / power-down

The parameters given in Table 22 are derived from tests performed under the ambient

temperature condition summarized in Table 21.

6.3.3

Embedded reset and power control block characteristics

The parameters given in Table 23 are derived from tests performed under the ambient

temperature conditions summarized in Table 21: General operating conditions.

Ambient temperature for the

suffix 6 version

Maximum power dissipation

–40

°C

Low-power dissipation(5)

–40

105

Ambient temperature for the

suffix 3 version

Maximum power dissipation

–40

125

Low-power dissipation(5)

–40

130

Junction temperature range

Suffix 6 version

–40

105

°C

Suffix 3 version

–40

130

1. When RESET is released functionality is guaranteed down to VBOR0 Min.

2. This formula has to be applied only on the power supplies related to the IO structure described by the pin definition table.

Maximum I/O input voltage is the smallest value between Min(VDD, VDDA, VDDUSB)+3.6 V and 5.5V.

3. For operation with voltage higher than Min (VDD, VDDA, VDDUSB) +0.3 V, the internal Pull-up and Pull-Down resistors must

be disabled.

4. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax (see Section 7.8: Thermal characteristics).

5. In low-power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Section 7.8:

Thermal characteristics).

Table 21. General operating conditions (continued)

Symbol

Parameter

Conditions

Min

Max

Unit

Table 22. Operating conditions at power-up / power-down

Symbol

Parameter

Conditions

Min

Max

Unit

tVDD

VDD rise time rate

∞

µs/V

VDD fall time rate

ULPEN = 0

∞

ULPEN = 1

100

∞

ms/V

tVDDA

VDDA rise time rate

∞

µs/V

VDDA fall time rate

∞

tVDDUSB

VDDUSB rise time rate

∞

VDDUSB fall time rate

∞

Table 23. Embedded reset and power control block characteristics

Symbol

Parameter

Conditions(1)

Min

Typ

Max

Unit

tRSTTEMPO(2)

Reset temporization after

BOR0 is detected

VDD rising

250

400

μs

VBOR0(2)

Brown-out reset threshold 0

Rising edge

1.62

1.66

1.7

Falling edge

1.6

1.64

1.69

STM32L412R8I3PTR 数据表(PDF) 79 Page - STMicroelectronics

STM32L412R8I3PTR 数据表(HTML) 79 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

STM32L412R8I3PTR 数据表(PDF) 79 Page - STMicroelectronics

STM32L412R8I3PTR 数据表(HTML) 79 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载