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STPMIC1DPQR 数据表(PDF) 73 Page - STMicroelectronics |
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STPMIC1DPQR 数据表(HTML) 73 Page - STMicroelectronics |
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73 / 140 page  6.2.5 Restart status register (RESTART_SR) Table 23. RESTART_SR 7 6 5 4 3 2 1 0 OP_MODE LDO4_SRC[1:0] R_VINOK_FA R_PKEYLKP R_WDG R_SWOFF R_RST R R R R R R R R Address: 0x05 Type: read register only Default: b000x_xxxx where x depends on last restart condition Description: Restart status register. This register mainly contains identification of the last restart condition. Either turn-OFF condition with restart_request option set, or from RSTn assertion from application processor. (Refer to Section 5.4.3 Turn-OFF conditions and restart_request) and Section 5.4.4 Reset and mask_reset option. Bits prefixed with R_ are set during transition from POWER_DOWN to CHECK&LOAD. This register also contains active operating mode (MAIN or ALTERNATE) and current LDO4 input source. (Refer to Section 4.2.2 LDO regulators - special features). [7] OP_MODE: Operating mode. Signal if the STPMIC1 is in MAIN mode or ALTERNATE mode. 0: STPMIC1 is in MAIN mode 1: STPMIC1 is in ALTERNATE mode [6 :5] LDO4_SRC[1:0]: LDO4 input source. Provides status of LDO4 input switch selection. 00: LDO4 is OFF 01: VIN supply selected 10: VBUSOTG supply selected 11: BSTOUT supply selected [4] R_VINOK_FA: Restart is due to VINOK_Fall turn-OFF condition while RREQ_EN bit is set 0: False 1: True [3] R_PKEYLKP: Restart is due to PONKEYn long key press turn- OFF condition while RREQ_EN bit is set 0: False 1: True [2] R_WDG: Restart is due to watchdog turn-OFF condition while RREQ_EN bit is set 0: False 1: True [1] R_SWOFF: Restart is due to SWOFF turn-OFF condition while RREQ_EN bit is set 0: False 1: True [0] R_RST: Restart is due to RSTn signal asserted by application processor 0: False 1: True STPMIC1 Status registers DS12792 - Rev 7 page 73/140 |
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