MITSUBISHI < STD. LINEAR ICs >

M62320P,FP

2/20,1998(rev) (

/ 9 )

MITSUBISHI ELECTRIC

8-BIT I/O EXPANDER for I C BUS

2

1. Write mode : I C BUS data input to Parallel data output

2. Read mode :Parallel data input to I C BUS data output

DIGITAL DATA FORMAT

• 8bit data

D2

D1

D0

D3

D4

D5

D6

D7

First

Last

MSB

LSB

• I/O setting data (I/O setting of parallel data I/O terminals.)

P2

P1

P0

P3

P4

P5

P6

P7

First

Last

MSB

LSB

DATA INPUT from parallel data terminals = Low

DATA OUTPUT to parallel data terminals = High

• S : Start Condition

While SCL level is high, SDA line level should be changed from high to low.

• P : Stop condition

While SCL level is high, SDA level should be changed from low to high.

• W: Write (SDA = LOW), R : Read (SDA = HIGH)

• A: Acknowledge bit

Lower three bits (A0,A1,A2) are a programmable address.

This IC is accessed only when the lower 3 bits data of slave

address coincide with the data of CS0 to CS2. (refer to the

right table)

• Slave address

First

Last

0

1

1

1

A2

A1

A0

MSB

LSB

• Each bit data corresponds to the I/O state of

the parallel data terminals.

First

Last

Transmission from Master (MCU etc.) to Slave (M62320)

Transmission from Slave (M62320) to Master (MCU etc.)

• Chip select data

MSB

LSB

(L=Low,H=High)

A

A

A

S

SLAVE ADDRESS W

A

8BIT DATA

P

I/O SETTING

A

8BIT DATA

8BIT

DATA

A2

A1

A0

0

1

00L

L

L

00

L

L

H

1H

LL

H

1

00

11

H

H

CS2

CS1 CS0

Last

First

A

A

S

SLAVE ADDRESS W

A

8BIT DATA

P

8BIT DATA A

8BIT DATA

8BIT

DATA

A

6

2

2