ASPM34 datasheet(13/15 Pages) ONSEMI

13 / 15 page

NFVA23512NP2T

www.onsemi.com

Figure 13. Typical Application Circuit

NOTES:

15.To avoid malfunction, the wiring of each input should be as short as possible. (less than 2 − 3 cm)

16.VFO output is open−drain type. The signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO

up to 2 mA. Refer to Figure 13.

17.Fault out pulse width can be adjust by capacitor C5 connected to the CFOD terminal.

18.Input signal is active−HIGH type. There is a 5 kW resistor inside the IC to pull−down each input signal line to GND. RC coupling circuits should be adopted

for the prevention of input signal oscillation. R1C1 time constant should be selected in the range 50∼150 ns. (Recommended R1 = 100 W, C1 = 1 nF)

19.Each wiring pattern inductance of A point should be minimized (Recommended less than 10 nH). Use the shunt resistor R4 of surface mounted (SMD) type

to reduce wiring inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor R4 as close as possible.

20.To insert the shunt resistor to measure each phase current at NU, NV, NW terminal, it makes to change the trip level ISC about the short−circuit current.

21.To prevent errors of the protection function, the wiring of B, C and D point should be as short as possible. The wiring of B between CSC filter and RSC terminal

should be divided at the point that is close to the terminal of sense resistor R5.

22.For stable protection function, use the sense resistor R5 with resistance variation within 1% and low inductance value.

23.In the short−circuit protection circuit, please select the R6C6 time constant in the range 1.0∼1.5 ms. R6 should be selected with minimum of 10 times larger

resistance than sense resistor R5. Do enough evaluation on the real system because short−circuit protection time may vary wiring pattern layout and value

of the R6C6 time constant.

24.Each capacitor should be mounted as close to the pins of the ASPM34 product as possible.

25.To prevent surge destruction, the wiring between the smoothing capacitor C7 and the P & GND pins should be as short as possible. The use of a high−frequen-

cy non−inductive capacitor between the P & GND pins is recommended.

26.Relays are used at almost every systems of electrical equipment at industrial application. In these cases, there should be sufficient

distance between the MCU and the relays.

27.The Zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply

terminals (Recommended Zener diode is 22 V/1 W, which has the lower Zener impedance characteristic than about 15 W).

28.C2 of around seven times larger than bootstrap capacitor C3 is recommended.

29.Choose the electrolytic capacitor with good temperature characteristic in C3. Choose 0.1∼0.2 mF R−category ceramic capacitors with good temperature and

frequency characteristics in C4.

Fault

VDC

Gating UH

Gating VH

Gating WH

Gating WL

Gating VL

Gating UL

W−Phase Current

V−Phase Current

U−Phase Current

C1 C1 C1

5V line

LVIC

COM

VDD

VFO

CSC

OUT

W (2)

P (1)

(24) VS(U)

(23) VB(U)

(29) VS(V)

(28) VB(V)

(17) CSC

(15) VFO

(14) IN(WL)

(13) IN (VL)

(12) IN (UL)

HVIC

OUT

(25) IN (VH)

(10) VDD(L)

(19) IN (UH)

(34) VS(W)

(33) VB(W)

(21) VDD(UH)

(30) IN(WH)

Thermistor

(11) COM(L)

VDD

COM

CFOD

NU (7)

NV (6)

NW (5)

U (4)

V (3)

(8) RTH

(9) VTH

(16) CFOD

RSC (18)

(20) COM(H)

(22) VBD(U)

(26) VDD(VH)

(27) VBD(V)

(31) VDD(WH)

(32) VBD(W)

HVIC

OUT

VDD

COM

HVIC

OUT

VDD

COM

15V line

5V line

Temp.

Monitoring

Sense

Resistor

Shunt

Resistor

Control

GND Line

Power

GND Line

SPM is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.

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