VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

VSC830

Dual 2x2 Crosspoint Switch

2.7Gb/s Asynchronous

G52192-0, Rev 4.0

Page 13

05/23/01

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The high-speed outputs (Y1A+/-, Y1B+/-, Y2A+/- and Y2B+/-) each consist of a differential pair designed

to drive a 50

Ω transmission line. The transmission line should be terminated with a 100Ω resistor at the receiver

of the downstream device between the true and complement outputs. No connection to a termination voltage is

required. The output driver is source terminated to 50

Ω on-chip, providing a snubbing of any reflections. Out-

50

Ω. Some output termination examples are shown in Figures 6 and 7.

Figure 6: Examples of High-Speed Output I/O Termination for VSC830

50

Ω

50

Ω

50Ω

0.1 µF

0.1 µF

50Ω

50

Ω

50

Ω

100Ω

0.1 µF

0.1 µF

50

Ω

50

Ω

0.1 µF

0.1 µF

50Ω

50Ω

100 pF

a) AC Termination #1

b) AC Termination #2 (Internal biasing required for Receiver)

c) AC Termination #3