VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

VSC830

Dual 2x2 Crosspoint Switch

2.7Gb/s Asynchronous

G52192-0, Rev 4.0

Page 3

05/23/01

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Functional Description

Select

As shown in Figure 1, each output can be treated as a 2:1 multiplexer, with the A1 and A2 inputs common

to both multiplexers. The select input S1 independently controls the state of the multiplexer that drives output

Y1, and select input S2 independently controls the output of Y2.

Figure 1: Select Functional Block Diagram

Table 1 specifies the function of the select inputs.

Table 1: Select Function

MODE

The interface level of the select pins, S1 and S2, can be programmed to either TTL or PECL levels by short-

tion of MODE is specified in Table 2.

Table 2: MODE Function

S1

S2

Y1

Y2

0

0

A1

A1

1

0

A2

A1

0

1

A1

A2

1

1

A2

A2

MODE

S1, S2

TTL

PECL

A1

A2

Y1

Y2

S1

S2