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OPA855 数据表(PDF) 25 Page - Texas Instruments |
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OPA855 数据表(HTML) 25 Page - Texas Instruments |
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25 / 35 page ![]() When configuring the OPA855-Q1 as a transimpedance amplifier additional care must be taken to minimize the inductance between the avalanche photodiode (APD) and the amplifier. Always place the photodiode on the same side of the PCB as the amplifier. Placing the amplifier and the APD on opposite sides of the PCB increases the parasitic effects due to via inductance. APD packaging can be quite large which often requires the APD to be placed further away from the amplifier than ideal. The added distance between the two device results in increased inductance between the APD and op amp feedback network as shown in Figure 11-2. The added inductance is detrimental to a decompensated amplifiers stability since it isolates the APD capacitance from the noise gain transfer function. The noise gain is given by Equation 2. The added PCB trace inductance between the feedback network increases the denominator in Equation 2 thereby reducing the noise gain and the phase margin. In cases where a leaded APD in a TO can is used inductance should be further minimized by cutting the leads of the TO can as short as possible. The layout shown in Figure 11-2 can be improved by following some of the guidelines shown in Figure 11-3. The two key rules to follow are: • Add an isolation resistor RISO as close as possible to the inverting input of the amplifier. Select the value of RISO to be between 10 Ω and 20 Ω. The resistor dampens the potential resonance caused by the trace inductance and the amplifiers internal capacitance. • Close the loop between the feedback elements (RF and CF) and RISO as close to the APD pins as possible. This ensures a more balanced layout and reduces the inductive isolation between the APD and the feedback network. F IN Z Noise Gain 1 Z § · ¨ ¸ © ¹ (2) where • ZF is the total impedance of the feedback network. • ZIN is the total impedance of the input network. Vbias CF 1 FB 8 PD 2 NC 7 VS+ 3 IN± 6 OUT 4 IN+ 5 VS± Thermal Pad APD Package Trace inductance isolates APD capacitance from the amplifier noise gain RF Figure 11-2. Non-Ideal TIA Layout Vbias Place RISO close to IN± Close the loop close to APD pins 1 FB 8 PD 2 NC 7 VS+ 3 IN± 6 OUT 4 IN+ 5 VS± Thermal Pad APD Package CF RF RISO Figure 11-3. Improved TIA Layout www.ti.com OPA855-Q1 SBOSA57A – FEBRUARY 2021 – REVISED MARCH 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: OPA855-Q1 |
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