LTC4367 datasheet(13/24 Pages) AD

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LTC4381

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

Fault Timer Operation in Overcurrent

TMR pin behavior in overcurrent is substantially the same

as in overvoltage. In the presence of an overcurrent con-

dition when the LTC4381 regulates the output current, the

TMR pin charges from 0V to 1.215V with a current that

varies principally as a function of the power dissipated in

the MOSFET. In addition to the variable current, an addi-

tional 24µA hastens timeout in a low impedance short

where the output is less than 1.5V. This additional current

is reduced to 6µA when VOUT is above 3V.

The TMR pin current with VOUT less than 1.5V is given

by Equation 5.

ITMR = 0.0917

⎡

⎣

⎢

⎤

⎦

⎥ • ID •RSNS •

VDS

RDRN

− 70 µA

[ ]

⎛

⎝

⎜

⎞

⎠

⎟

+24.5 µA

[ ]

(5)

where 24.5μA is the extra TMR current during overcurrent

condition. If IDRN is less than 70µA, use ITMR of 24µA.

And with VOUT above 3V given by Equation 6.

ITMR = 0.0917

⎡

⎣

⎢

⎤

⎦

⎥ • ID •RSNS •

VDS

RDRN

− 70 µA

[ ]

⎛

⎝

⎜

⎞

⎠

⎟

+6 µA

[ ]

(6)

where 6μA is the extra TMR current during overcurrent

condition. If IDRN is less than 70µA, use ITMR of 6µA.

When TMR reaches 1.215V, the FLT pin pulls low and the

MOSFET is turned off and allowed to cool for an extended

period. The total elapsed time between the onset of output

clamping and turning off is given by Equation 7.

tTMR = VTMR(F) •

CTMR

ITMR

(7)

Because ITMR is a function of VDS and ID, the exact time

spent in overcurrent before turning off depends upon the

input waveform, the output voltage and the time required

for the output current to come into regulation.

Cool Down Phase

Cool down behavior is the same whether initiated by over-

voltage or overcurrent. During the cool down phase, the

timer continues to charge from 1.215V to 3.4V with 2µA,

and then discharge back down to 1.215V with 2µA. This

cycle repeats 14 times and at the 15th cycle the TMR pin

is pulled all the way to ground. The total cool down time

is given by Equation 8.

tCOOL = CTMR •

15 • 4.37V

+(1.215V – 0.1V)

2 µA

[ ]

= CTMR • 33.3

µF

⎡

⎣⎢

⎤

⎦⎥

(8)

where CTMR is in µF.

Up to this point the operation of the LTC4381-1/LTC4381-3

and LTC4381-2/LTC4381-4 is the same. Behavior at the

end of the cool down phase is entirely different.

At the end of the cool down phase, when TMR crosses

the 100mV reset threshold, the LTC4381-1/LTC4381-3

remain latched off and FLT remains low. They may be

restarted by pulling the ON pin low for at least 100µs or

by cycling the power supply. The cool down phase may

be interrupted at anytime by pulling the ON pin low for at

least 10ms/µF of CTMR; the LTC4381-1/LTC4381-3 will

restart when ON goes high. The LTC4381-2/LTC4381-4

will automatically retry at the end of the cool down phase

without cycling the ON pin and the cool down phase

may be interrupted by pulling the ON pin low for at least

10ms/µF of CTMR.

For both versions, the FLT pin goes high in shutdown and

is cleared high when power is first applied to VCC. If FLT

is set low, it can be reset during the cool down phase by

pulling the ON pin low for at least 10ms/µF of CTMR.

Supply Transient Protection

The LTC4381-1/LTC4381-2 is tested to operate to 80V

and the LTC4381-3/LTC4381-4 to 72V. The IN and VCC

pins are guaranteed to be safe from damage up to 100V

and 80V, respectively. Voltage transients above these volt-

ages may cause permanent damage. During a short-cir-

cuit condition, the large change in current flowing through

power supply traces and associated wiring can cause

large inductive voltage transients. To minimize the voltage

transients, minimize the power trace parasitic inductance

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