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XRAG2 数据表(PDF) 2 Page - STMicroelectronics |
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XRAG2 数据表(HTML) 2 Page - STMicroelectronics |
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2 / 8 page ![]() 1 Summary description XRAG2 2/8 1 Summary description The XRAG2 is a full-featured, low-cost integrated circuit for use in Radio Frequency Identification (RFID) transponders (tags) operating at UHF frequencies. It is a 432-bit memory organized in 16-bit Words in 3 or 4 memory banks as shown in Figure 3 and Figure 4. When connected to an antenna, the operating power is derived from RF energy produced by the RFID reader. Incoming data are demodulated and decoded from the received Double-Side Band Amplitude Shift Keying (DSB-ASK), Single-Side Band Amplitude Shift Keying (SSB-ASK) or Phase-Reversal Amplitude Shift Keying modulation signal. Outgoing data are generated by antenna reflectivity variations using either the FM0 or Miller bit coding principle (RFID reader parameter). A Kill function is provided to permanently disable the tag. Anti-collision features enable the rapid inventorying of tag populations. Communication between reader and tag are Half-duplex meaning that tags do not decode reader commands while backscattering. The data transfer rate is defined by the local UHF frequency regulations. The XRAG2 is fully compliant with the ePC Global Class-1 Generation-2 UHF RFID specification (Revision 1.0.9) for the radio-frequency power and signal interface. The reader and the XRAG2 dialog through the following consecutive operations known as RTF (Reader Talk First) communication: ● Activation of the XRAG2 by the UHF operating field of the reader ● Transmission of a command by the reader ● Transmission of a response by the XRAG2 Table 1. Signal names The XRAG2 is specifically designed for extended range applications that need automatic item identification. The XRAG2 provides a fast and flexible anti-collision protocol that is robust in noisy and unpredictable RF conditions typical of RFID applications. The XRAG2 EEPROM memory can be read and write which enable users to program the EPC code and USER memory at the point of application, if desired. Figure 2. Pad connections AC1 Antenna Pad AC0 Antenna Pad (GND) memory Power Supply Regulator Demodulator ASK Reflecting Modulator EEPROM AC1 AC0 432-bit |
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