XRAG2

2 XRAG2 memory mapping

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2

XRAG2 memory mapping

The XRAG2 is a 432-bit memory divided into a 3-memory bank (without USER memory) or

4-memory bank (with USER memory) configuration. Each bank is organized into 16-bit Words.

The reader can read part or all of each memory bank in single or multiple groups of 16-bit

Words. Use the WRITE command to write to device memory using 16-bit Words. The

BLOCKWRITE command enables readers to write up to four 16-bit Words to device memory at

a single time. Erase multiple 16-bit Words (up to the complete memory bank) using the

BLOCKERASE command.

Note:

The 64-bit TID memory content is written by STMicroelectronics during the manufacturing

process in compliance with the ISO 15963 Technical Report in order to comply with ISO 18000

recommendations.

Figure 3 describes the three-memory bank configuration.

Table 2.

Memory bank description

Memory Bank

Description

USER

User-specific data

TID (Tag-identification Data)

Manufacturer and custom information

EPC (Electronic Product Code)

CRC-16, Protocol Control and item identification code (EPC)

RESERVED

Kill and access passwords

Figure 3.

Three-memory bank configuration

TID Bank

RESERVED Bank

EPC Bank

64-bit

304-bit

64-bit

TID

TID

TID

TID = E002h

30h

20h

10h

00h

3Fh

2Fh

1Fh

0Fh

Access Password

Access Password

Kill Password

Kill Password

30h

20h

10h

00h

3Fh

2Fh

1Fh

0Fh

RFU

EPC

...

up to 256 EPC bit

120h

110h

...

...

12Fh

11Fh

...

...

...

EPC

(PC+EPC) length

CRC16

...

20h

10h

00h

...

2Fh

1Fh

0Fh

AFI/NSI

Bank 10

Bank 01

Bank 00