ADPD188GG

Data Sheet

Rev. B | Page 48 of 61

Address

Data Bit

Default

Value

Access

Name

Description

0x30

[15:13]

0x0

R/W

Reserved

Write 0x0.

[12:8]

0x3

R/W

SLOTA_LED_WIDTH

LED pulse width (in 1 µs step) for Time Slot A.

[7:0]

0x20

R/W

SLOTA_LED_OFFSET

LED offset width (in 1 µs step) for Time Slot A.

0x31

[15:8]

0x08

R/W

SLOTA_PULSES

Time Slot A.

[7:0]

0x18

R/W

SLOTA_PERIOD

8 LSBs of LED Time Slot A pulse period (in 1 µs step).

0x34

[15:10]

0x00

R/W

Reserved

Write 0x0.

9

0x0

R/W

SLOTB_LED_DIS

Time Slot B LED disable. 1: disables the LED assigned to Time Slot B.

Register 0x34 keeps the drivers active and prevents them from

pulsing current to the LEDs. Disabling both LEDs via this register

is often used to measure the dark level.

Use Register 0x11 instead to enable or disable the actual time slot

usage and not only the LED.

8

0x0

R/W

SLOTA_LED_DIS

Time Slot A LED disable. 1: disables the LED assigned to Time Slot A.

Use Register 0x11 instead to enable or disable the actual time slot

usage and not only the LED.

[7:0]

0x00

R/W

Reserved

Write 0x00.

0x35

[15:13]

0x0

R/W

Reserved

Write 0x0.

[12:8]

0x3

SLOTB_LED_WIDTH

LED pulse width (in 1 µs step) for Time Slot B.

[7:0]

0x20

SLOTB_LED_OFFSET

LED offset width (in 1 µs step) for Time Slot B.

0x36

[15:8]

0x08

R/W

SLOTB_PULSES

[7:0]

0x18

R/W

SLOTB_PERIOD

8 LSBs of LED Time Slot B pulse period (in 1 µs step).

1

LED equations provide an estimate of the LED current to within ±20% at 25°C when applying 5.0 V on the VLEDx pin. This current varies with the VLEDx supply level

and temperature.

AFE CONFIGURATION REGISTERS

Table 28. AFE Global Configuration Registers

Address

Data Bit

Default

Value

Access

Name

Description

0x37

[15:13]

0x0

R/W

CH34_DISABLE

Power-down options for Channel 3 and Channel 4 only.

Bit 13: power down Channel 3, Channel 4 TIA op amp.

Bit 14: power down Channel 3, Channel 4 BPF op amp.

Bit 15: power down Channel 3, Channel 4 integrator op amp.

[12:10]

0x0

R/W

CH2_DISABLE

Bit 10: power down Channel 2 TIA op amp.

Bit 11: power down Channel 2 BPF op amp.

Bit 12: power down Channel 2 integrator op amp.

[9:8]

0x0

R/W

SLOTB_PERIOD

8 MSBs of LED Time Slot B pulse period.

[7:2]

0x00

R/W

Reserved

Write 0x00

[1:0]

0x0

R/W

SLOTA_PERIOD

8 MSBs of LED Time Slot A pulse period.

0x3C

[15:14]

0x0

R/W

Reserved

Write 0x0.

[13:11]

0x6

R/W

Reserved

Write 0x6.

10

0x0

R/W

Reserved

Reserved.

9

0x0

R/W

V_CATHODE

0x0: 1.3 V (identical to anode voltage).

0x1: 1.8 V (reverse bias photodiode by 550 mV). This

setting may add noise.