Data Sheet

ADMV7320

Rev. C | Page 7 of 29

Pin No.

Mnemonic

Description

11

VGA_CTL12

Gain Control Voltage for the First and Second Stage Variable Gain Amplifier.

See Figure 86 for the recommended external components.

16

VGA_VG345

Gate Control for the Third, Fourth, and Fifth Stage Variable Gain Amplifier. See

Figure 86 for the recommended external components.

17

VGA_VD345

Drain Voltage for the Third, Fourth, and Fifth Stage Variable Gain Amplifier. See

Figure 86 for the recommended external components.

19

VGA_VG6

Gate Control for the Sixth Stage Variable Gain Amplifier. See Figure 86 for the

recommended external components.

20

VGA_VD6

Drain Voltage for the Sixth Stage Variable Gain Amplifier. See Figure 86 for the

recommended external components.

21

DET1_REF

Reference Voltage for the VGA Power Detector. DET1_REF is the dc bias of the

diode biased through an external resistor used for the temperature

compensation of DET1_OUT.

22

DET1_OUT

Detector Voltage for the VGA Power Detector. DET1_OUT is the dc voltage

representing the RF output power rectified by the diode, which is biased

through an external resistor.

24

PA_VG1

Gate Voltage for the First Power Amplifier. See Figure 86 for the recommended

external components.

26

PA_VG2

Gate Voltage for the Second Power Amplifier. See Figure 86 for the

recommended the external components.

28

DET2_REF

Reference Voltage for the PA Power Detector. DET2_REF is the dc bias of the

diode biased through an external resistor used for the temperature

compensation of DET2_OUT.

29

DET2_OUT

Detector Voltage for the VGA Power Detector. DET2_OUT is the dc voltage

representing the RF output power rectified by the diode, which is biased

through an external resistor.

35

PA_VD2

Drain Voltage for the Second Power Amplifier. See Figure 86 for the

recommended external components.

37

PA_VD1

Drain Voltage for the First Power Amplifier. See Figure 86 for the

recommended external components.

40

LOIN

LO Input. This pin is dc-coupled and matched to 50 Ω.

42

VG_MULT

Gate Voltage for the LO Multiplier. See Figure 86 for the recommended

external components.

44

VD_MULT

Drain Voltage for the LO Multiplier. See Figure 86 for the recommended

external components.

46

VG_AMP

Gate Voltage for the LO Amplifier. See Figure 86 for the recommended external

components.

48

VD_AMP

Drain Voltage for the LO Amplifier. See Figure 86 for the recommended

external components.

49

VG_MIXER

Gate Voltage for the Field Effect Transistor (FET) Mixer. See Figure 86 for the

recommended external components.

PORT 1

RFOUT

WR-12 Waveguide Port. This port is ac-coupled and matched to the waveguide

output impedance.

EPAD

Exposed Pads. The exposed ground pads must be connected to RF and dc ground.