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L6986ITR 数据表(PDF) 3 Page - STMicroelectronics |
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L6986ITR 数据表(HTML) 3 Page - STMicroelectronics |
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3 / 60 page ![]() 2 Pin connection Figure 2. Pin connection (top view) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 RST VCC SS/INH SYNCH FSW MLF COMP DELAY VBIAS VIN LX LX PGND PGND SGND FB EXPOSED PAD TO SGND+PGND Table 1. Pin description Number Pin Description 1 RST The RST open collector output is driven low when the output voltage is out of regulation. The RST is released after an adjustable time DELAY once the primary output voltage is over the active delay threshold. 2 VCC Connect a ceramic capacitor (≥ 470 nF) to filter internal voltage reference. This pin supplies the embedded analog circuitry. 3 SS / INH An open collector stage can disable the device clamping this pin to GND (INH mode). An internal current generator (4 µA typ.) charges the external capacitor to implement the soft-start. 4 SYNCH The pin features master / slave synchronization. Leave this pin floating when it is not used. 5 FSW A pull-up resistor (E24 series only) to VCC or pull-down to GND selects the switching frequency. Pin strapping is active only before the soft-start phase to minimize the IC consumption. 6 MLF Connect this pin to ground either directly or through a pull-down resistor if the RST threshold should be adjusted (see Table 7). 7 COMP Output of the error amplifier. The designed compensation network is connected at this pin. 8 DELAY An external capacitor connected to this pin sets the time DELAY to assert the rising edge of the RST open collector after the output voltage is over the reset threshold. If this pin is left floating, RST is like a Power Good. 9 FB Primary output voltage sensing 10 SGND Signal GND 11 PGND Power GND 12 PGND Power GND 13 LX Switching node 14 LX Switching node 15 VIN DC input voltage 16 VBIAS Typically connected to the regulated primary output voltage, if it does not exceed 6 V. Otherwise connect it to GND. - Exposed pad Exposed pad must be connected to SGND, PGND L6986I Pin connection DS13647 - Rev 1 page 3/60 |
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