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ADTR1107ACCZ-R7 数据表(PDF) 20 Page - Analog Devices

部件名 ADTR1107ACCZ-R7
功能描述  6 GHz to 18 GHz, Front-End IC
PDF  28 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADTR1107ACCZ-R7 数据表(HTML) 20 Page - Analog Devices

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ADTR1107
Data Sheet
Rev. A | Page 20 of 28
25
20
–5
0
10
15
5
110
105
80
85
95
100
90
–20
2
0
–4
–8
–16
–2
–6
–12 –10
–18
–14
INPUT POWER (dBm)
POUT
GAIN
PAE
IDD_LNA
Figure 75. POUT, Gain, PAE and IDD_LNA vs. Input Power, 18 GHz, Receive State,
Path = ANT to RX_OUT, Self Biased Mode, VDD_LNA = 3.3 V, VGG_LNA = 0 V,
Transmit State Off
30
15
24
18
21
27
520
17
13
11
719
15 16
18
14
12
910
68
FREQUENCY (GHz)
+85°C
+25°C
–40°C
Figure 76. OIP3 vs. Frequency for Various Temperatures, POUT/Tone = 0 dBm,
Receive State, Path = ANT to RX_OUT, Self Biased Mode, VDD_LNA = 3.3 V,
VGG_LNA = 0 V, Transmit State Off
30
0
20
10
15
25
5
520
17
13
11
719
15 16
18
14
12
910
68
FREQUENCY (GHz)
50mA
100mA
85mA, SELF BIAS MODE
Figure 77. OIP3 vs. Frequency for Various IDQ_LNA, POUT/Tone = 0 dBm,
Receive State, Path = ANT to RX_OUT, Self Biased Mode, VDD_LNA = 3.3 V,
Controlled VGG_LNA, Transmit State Off
0.5
0.4
0
0.2
0.3
0.1
–20
6
–12
2
–18
–6
–10
4
–16
–2
–4
–8
–14
0
INPUT POWER (dBm)
6GHz
8GHz
10GHz
12GHz
14GHz
16GHz
18GHz
MAX PDISS
Figure 78. Power Dissipation vs. Input Power at TA = 85°C, Receive State,
Path = ANT to RX_OUT, Self Biased Mode, VDD_LNA = 3.3 V, VGG_LNA = 0 V,
Transmit State Off
30
15
24
18
21
27
520
17
13
11
719
15 16
18
14
12
910
68
FREQUENCY (GHz)
2.0V
3.0V
3.3V
3.6V
Figure 79. OIP3 vs. Frequency for Various VDD_LNA, POUT/Tone = 0 dBm,
Receive State, Path = ANT to RX_OUT, Self Biased Mode, VGG_LNA = 0 V,
Transmit State Off
30
0
20
10
15
25
5
520
17
13
11
719
15 16
18
14
12
910
68
FREQUENCY (GHz)
0dBm
5dBm
Figure 80. OIP3 vs. Frequency for Various POUT/Tone, Receive State, Path =
ANT to RX_OUT, Self Biased Mode, VDD_LNA = 3.3 V, VGG_LNA = 0 V,
Transmit State Off



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