STM32H723VG datasheet(21/227 Pages) STMICROELECTRONICS

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DS13313 Rev 2

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STM32H723xE/G

Functional overview

3.3

Memories

3.3.1

Embedded Flash memory

The STM32H723xE/G devices embed up to 1 Mbyte of Flash memory that can be used for

storing programs and data.

The Flash memory is organized as 266-bit Flash words memory that can be used for storing

both code and data constants. Each word consists of:

•

one Flash word (8 words, 32 bytes or 256 bits)

•

10 ECC bits (single-error correction and double-error detection).

The Flash memory is organized as follows:

•

up to 1 Mbyte of user Flash memory block containing eight user sectors of 128 Kbytes

(4 K Flash memory words)

•

128 Kbytes of system Flash memory from which the device can boot

•

2 Kbytes (64 Flash words) of user option bytes for user configuration

3.3.2

Embedded SRAM

All devices feature:

•

from 128 to 320 Kbytes of AXI-SRAM mapped onto the AXI bus on D1 domain

•

SRAM1 mapped on D2 domain: 16 Kbytes

•

SRAM2 mapped on D2 domain: 16 Kbytes

•

SRAM4 mapped on D3 domain: 16 Kbytes

•

4 Kbytes of backup SRAM

The content of this area is protected against possible unwanted write accesses, and

can be retained in Standby or VBAT mode.

•

RAM mapped to TCM interface (ITCM and DTCM):

Both ITCM and DTCM RAMs are 0 wait state memories. They can be accessed either

from the CPU or the MDMA (even in Sleep mode) through a specific AHB slave of the

Cortex®-M7CPU(AHBSAHBP):

–

64 to 256 Kbytes of ITCM-RAM (instruction RAM)

This RAM is connected to ITCM 64-bit interface designed for execution of critical

real-times routines by the CPU.

–

128 Kbytes of DTCM-RAM (2x 64-Kbyte DTCM-RAMs on 2x32-bit DTCM ports)

The DTCM-RAM could be used for critical real-time data, such as interrupt service

routines or stack/heap memory. Both DTCM-RAMs can be used in parallel (for

load/store operations) thanks to the Cortex®-M7 dual issue capability.

The MDMA can be used to load code or data in ITCM or DTCM RAMs. As reflected

above, 192 Kbyte of RAM can be used either for AXI SRAM or ITCM, with a 64Kbyte

granularity.

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