The device features an embedded programmable voltage detector (PVD) that monitors the VDD power supply

and compares it to the VPVD threshold. An interrupt can be generated when VDD drops below the VPVD

threshold and/or when VDD is higher than the VPVD threshold. The interrupt service routine can then generate a

warning message and/or put the MCU into a safe state. The PVD is enabled by software.

The MCU supports three low-power modes to achieve the best compromise between low power consumption,

short startup time and available wakeup sources:

•

Sleep mode

In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can wake up the CPU

when an interrupt/event occurs.

•

Stop mode

Stop mode achieves very low power consumption while retaining the content of SRAM and registers.

All clocks in the 1.8 V domain are stopped, the PLL, the HSI RC and the HSE crystal oscillators are

disabled. The voltage regulator can also be put either in normal or in low power mode.

The device can be woken up from Stop mode by any of the EXTI lines (one of the 16 external lines, the

•

Standby mode

The Standby mode is used to achieve the lowest power consumption. The internal voltage regulator is

switched off so that the entire 1.8 V domain is powered off. The PLL, the HIS RC and the HSE crystal

oscillators are also switched off. After entering Standby mode, SRAM and register contents are lost

except for registers in the RTC domain and Standby circuitry.

The device exits Standby mode when an external reset (NRST pin), an IWDG reset, a rising edge on

the WKUP pins, or an RTC event occurs.

6.2.3

High-speed external clock source

The high-speed external (HSE) clock can be generated from external clock signal or supplied with a 4 to 32

MHz crystal/ceramic resonator oscillator (see Figure 11). In the application, the resonator and the load capacitors

have to be placed as close as possible to the oscillator pins in order to minimize output distortion and startup

stabilization time.

1.

The REXT value depends on the crystal characteristics (refer to the crystal resonator manufacturer for more

details on them).

2.

The external clock signal has to respect the I/O characteristics and follows recommended clock input

waveform (refer to Figure 12).

STSPIN32F0251, STSPIN32F0252

Microcontroller unit

DS13048 - Rev 4

page 21/32