MCP47FVB02 datasheet(39/92 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS20005429B-page 39

MCP48FEBXX

Technology Status Register.

DAC WIPERLOCK TECHNOLOGY STATUS REGISTER (VOLATILE) (ADDRESS 0BH)

U-0

R-0(1) R-0(1) R-0(1) R-0(1)

Single

—

—(2)

—(2) WL0B WL0A

Dual

—

WL1B WL1A WL0B WL0A

bit 15

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

= Single-channel device

= Dual-channel device

Single

Dual

bit 15-2

bit 15-4

Unimplemented:

Read as ‘0’

bit 1-0

bit 3-0

WLxB-WLxA:

WiperLock Technology Status bits: These bits reflect the state of the DLx:CLx

nonvolatile configuration bits.

= DAC wiper and DAC Configuration (volatile and nonvolatile registers) are locked.

(DLx = CLx = Enabled)

= DAC wiper (volatile and nonvolatile) and DAC Configuration (nonvolatile registers) are

locked (DLx = Enabled; CLx = Disabled).

= DAC wiper (nonvolatile) and DAC Configuration (nonvolatile registers) are locked.

(DLx = Disabled; CLx = Enabled)

= DAC wiper and DAC Configuration are unlocked (DLx = CLx = Disabled).

Note 1:

POR Value dependent on the programmed values of the DLx:CLx configuration bits. The devices are

shipped with a default DLx:CLx configuration bit state of ‘0’.

Unimplemented bit, read as ‘0’.

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