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PIMXRT516SCVP2A 数据表(PDF) 107 Page - NXP Semiconductors |
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PIMXRT516SCVP2A 数据表(HTML) 107 Page - NXP Semiconductors |
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107 / 128 page  Boot mode configuration i.MX RT1170 Crossover Processors Data Sheet for Consumer Products, Rev. 1, 05/2021 NXP Semiconductors 107 GPIO_SD_B2_02 usdhc2.DATA1 ALT 0 — GPIO_SD_B2_03 usdhc2.DATA0 ALT 0 — GPIO_SD_B2_04 usdhc2.CLK ALT 0 — GPIO_SD_B2_05 usdhc2.CMD ALT 0 — GPIO_SD_B2_06 usdhc2.RESET_B ALT 0 — GPIO_SD_B2_08 usdhc2.DATA4 ALT 0 — GPIO_SD_B2_09 usdhc2.DATA5 ALT 0 — GPIO_SD_B2_10 usdhc2.DATA6 ALT 0 — GPIO_SD_B2_11 usdhc2.DATA7 ALT 0 — Table 106. Boot through SPI1 PAD Name IO Function Mux Mode Comments GPIO_AD_28 lpspi1.SCK ALT 0 — GPIO_AD_29 lpspi1.PCS0 ALT 0 — GPIO_AD_30 lpspi1.SDO ALT 0 — GPIO_AD_31 lpspi1.SDI ALT 0 — Table 107. Boot through SPI2 PAD Name IO Function Mux Mode Comments GPIO_SD_B2_07 lpspi2.SCK ALT 6 — GPIO_SD_B2_08 lpspi2.PCS0 ALT 6 — GPIO_SD_B2_09 lpspi2.SDO ALT 6 — GPIO_SD_B2_10 lpspi2.SDI ALT 6 — Table 108. Boot through SPI3 PAD Name IO Function Mux Mode Comments GPIO_DISP_B1_04 lpspi3.SCK ALT 9 — GPIO_DISP_B1_07 lpspi3.PCS0 ALT 9 — GPIO_DISP_B1_06 lpspi3.SDO ALT 9 — GPIO_DISP_B1_05 lpspi3.SDI ALT 9 — Table 105. Boot through SD2 (continued) PAD Name IO Function Mux Mode Comments |
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