PIMXRT516SCVM5A datasheet(46/128 Pages) NXP

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i.MX RT1170 Crossover Processors Data Sheet for Consumer Products, Rev. 1, 05/2021

NXP Semiconductors

Electrical characteristics

NOTE

The term ‘NVCC_XXXX’ in this section refers to the associated supply rail

of an input or output.

NOTE

When enable the open drain for I/O pad, the external pull-up voltage cannot

exceed the associated supply rail.

Figure 5. Circuit for parameters Voh and Vol for I/O cells

4.3.1.1

XTALI and RTC_XTALI (clock inputs) DC parameters

Table 34 shows the DC parameters for the clock inputs.

4.3.1.2

General purpose I/O (GPIO) DC parameters

Following section introduces the GPIO DC parameters, respectively, for GPIO pads. These parameters are

guaranteed per the operating ranges in Table 11 unless otherwise noted.

Table 34. XTALI and RTC_XTALI DC parameters1

1 The DC parameters are for external clock input only.

Parameter

Symbol Test Conditions

Min

Max

Unit

XTALI high-level DC input voltage

Vih

—

VDDA_1P8_IN - 0.5

VDDA_1P8_IN

XTALI low-level DC input voltage

Vil

—

0.5

RTC_XTALI high-level DC input voltage

Vih

—

VDD_SNVS_ANA - 0.5

VDD_SNVS_ANA

RTC_XTALI low-level DC input voltage

Vil

—

0.5

Table 35. DC specification for GPIO_EMC_B1/GPIO_EMC_B2/GPIO_SD_B1/GPIO_SD_B2/GPIO_DISP_B1

bank

Parameter

Symbol

Value

Unit

Condition

Min

Typ

Max

Receiver 3.3 V

High level input voltage

VIH

0.625 x NVCC

—

NVCC + 0.3

—

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