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VS6624P0LP 数据表(PDF) 28 Page - STMicroelectronics |
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VS6624P0LP 数据表(HTML) 28 Page - STMicroelectronics |
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28 / 100 page ![]() Data synchronization methods VS6624 28/100 Rev 1 Mode 2 The structure of a mode 2 image frame is shown Figure 12. Figure 12. Mode 2 frame structure (VGA example) For mode 2, the synchronization codes are as listed in Table 5. Table 5. Mode 2 - embedded synchronization code definition Name Description 4-byte sequence LS Line start FF 00 00 00 LE Line end FF 00 00 01 FS Frame Start FF 00 00 02 FE Frame End FF 00 00 03 LE LS Frame of image data Line 1 Line 480 Frame blanking period FE FS |
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