AT25QL321-DWF datasheet(2/79 Pages) DIALOG

2 / 79 page

DS-25QL321–131C–5/2017

Features



Single 1.7V - 2.0V Supply

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Serial Peripheral Interface (SPI) and Quad Peripheral Interface (QPI) Compatible

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Supports SPI Modes 0 and 3

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Supports Dual Output Read and Quad I/O Program and Read

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Supports QPI Program and Read

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104 MHz* Maximum Operating Frequency

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Clock-to-Output (tV1) of 6 ns

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Up tp 65MB/S continuous data transfer rate

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Quad Enabled (factory default setting: see Section 6.4)

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Full Chip Erase

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Flexible, Optimized Erase Architecture for Code and Data Storage Applications

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0.6 ms Typical Page Program (256 Bytes) Time

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60 ms Typical 4-Kbyte Block Erase Time

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200 ms Typical 32-Kbyte Block Erase Time

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300 ms Typical 64-Kbyte Block Erase Time

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Hardware Controlled Locking of Protected Blocks via WP Pin

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4K-bit secured One-Time Programmable Security Register

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Hardware Write Protection

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Serial Flash Discoverable Parameters (SFDP) Register

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Flexible Programming

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Byte/Page Program (1 to 256 Bytes)

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Dual or Quad Input Byte/Page Program (1 to 256 Bytes)

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Accelerated programming mode via 9V ACC pin

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Erase/Program Suspend and Resume

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JEDEC Standard Manufacturer and Device ID Read Methodology

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Low Power Dissipation

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2µA Deep Power-Down Current (Typical)

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10µA Standby current (Typical)

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5mA Active Read Current (Typical)

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Endurance: 100,000 program/erase cycles (4KB, 32KB or 64KB blocks)

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Data Retention: 20 Years

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Industrial Temperature Range: -40°C to +85°C

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Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options

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8-lead SOIC (208-mil)

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8-pad DFN (6 x 5 x 0.6 mm)

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24-ball Ball Grid Array (BGA)

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8 and 10-ball WLCSP, die Ball Grid Array (dBGA)

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8-pad USON(3 x 4 x 0.55mm)

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Die in Wafer Form

AT25QL321

32-Mbit, 1.7V Minimum

SPI Serial Flash Memory with Dual I/O, Quad I/O and QPI Support

AT25QL321-DWF 数据表(PDF) 2 Page - Dialog Semiconductor

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