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PLL601-12SC-R 数据表(PDF) 3 Page - PhaseLink Corporation |
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PLL601-12SC-R 数据表(HTML) 3 Page - PhaseLink Corporation |
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3 / 5 page ![]() PLL601-12 Dual Output PLL Clock with Selectable Odd Multiplier 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 3 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD 4.6 V Input Voltage, dc VI -0.5 VDD+0.5 V Output Voltage, dc VO -0.5 VDD+0.5 V Storage Temperature TS -65 150 °C Ambient Operating Temperature* TA -40 85 °C Junction Temperature TJ 125 °C Lead Temperature (soldering, 10s) 260 °C ESD Protection, Human Body Model 2 kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con- ditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. Crystal Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Crystal Resonator Frequency FXIN Parallel Fundamental Mode (see Selection Table) 13 31 MHz Crystal Loading Rating CL (xtal) At VCON = 1.65V 16 pF Recommended ESR RE AT cut 30 Ω 3. General Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Fout<30MHz 15 30MHz<Fout<100MHz 30 Supply Current, Dynamic (with Loaded Outputs) IDD 15 pF load Fout >100MHz 40 mA Operating Voltage VDD 2.97 3.63 V Short Circuit Current ±50 mA 4. AC Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS 0.8V ~ 2.0V with 10 pF load 1.5 Output Clock Rise Time 0.3V ~ 3.0V with 15 pF load 3.7 5 2.0V ~ 0.8V with 10 pF load 1.5 Output Clock Fall Time 3.0V ~ 0.3V with 15pF load 3.7 5 ns Output Clock Duty Cycle Measured @ 1.4V 45 50 55 % |
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