PLL701-31

Low EMI Spread Spectrum Multiplier Clock

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991

www.phaselink.com

Rev 11/28/05 Page 2

BLOCK DIAGRAM

PIN DESCRIPTIONS

Name

Number

Type

Description

XIN/FIN

1

I

clock input.

XOUT/SD

2

B

At power-up, this pin is an input pin to select modulation magnitude and type.

After input sampling, this pin is crystal output. Has internal pull up resistor.

SC0

3

I

Digital control input to select modulation magnitude and type.

Has internal pull-up.

SC1

4

I

Digital control input to select modulation magnitude and type.

Has internal pull-up.

SC2

7

I

Digital control input to select modulation magnitude and type.

Has internal pull-up.

VDD

8

P

3.0(+/-10%)V Power Supply.

FOUT

6

O

Modulated Clock Frequency Output.

GND

5

P

Ground.

XTAL

OSC

FOUT

XIN/FIN

XOUT

SC(0:2)

SD

PLL

SST

Control

Logic