PLL520-17/-18/-19

Low Phase Noise VCXO with multipliers (for 65-130MHz Fund Xtal)

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 1

FEATURES

• 65MHz to 130MHz Fundamental Mode Crystal.

• Output range: 65MHz – 800MHz (selectable 1x,

2x, 4x and 8x multipliers).

• Low Injection Power for crystal 50uW.

• Available outputs: PECL, LVDS, or CMOS.

• Integrated variable capacitors.

• Supports 3.3V-Power Supply.

• Available in 16 pin (TSSOP or SOIC)

DESCRIPTION

The PLL520-17/-18/-19 family of VCXO IC’s is

specifically designed to pull high frequency

fundamental crystals. They achieve very low current

into the crystal resulting in better overall stability.

Their internal varicaps allow an on chip frequency

pulling, controlled by the VCON input.

BLOCK DIAGRAM

PIN CONFIGURATION

^: Internal pull-up

OUTPUT ENABLE LOGICAL LEVELS

Part #

OE

State

0 (Default)

Output enabled

PLL520-18

1

Tri-state

0

Tri-state

PLL520-17

PLL520-19

1 (Default)

Output enabled

OE input: Logical states defined by PECL levels for PLL520-18

Logical states defined by CMOS levels for PLL520-17/-19

XIN

XOUT

OE

Q

PLL520-17/-18/-19

VCON

Q

PLL by-pass

SEL

PLL

(Phase

Locked

Loop)

Oscillator

Amplifier

w/

integrated

varicaps

1

2

3

4

5

6

7

8

VDD

9

10

11

12

13

14

15

16

XIN

XOUT

SEL3^

SEL2^

OE

VCON

GND

SEL0^

SEL1^

GND

CLKC

VDD

CLKT

GND

GND