Triple PLL Field Programmable VCXO Clock Synthesizer

MDS 271 A

3

Revision 040705

Integrated Circuit Systems, Inc.

ICS271

PRELIMINARY INFORMATION

External Components

The ICS271 requires a minimum number of external

components for proper operation.

Series Termination Resistor

Clock output traces over one inch should use series

termination. To series terminate a 50

Ω trace (a

commonly used trace impedance), place a 33

Ω resistor

in series with the clock line, as close to the clock output

pin as possible. The nominal impedance of the clock

output is 20

Ω.

Decoupling Capacitors

As with any high-performance mixed-signal IC, the

ICS271 must be isolated from system power supply

noise to perform optimally.

Decoupling capacitors of 0.01µF must be connected

between each VDD, VDDO, and the PCB ground plane.

For optimum device performance, the decoupling

capacitor should be mounted on the component side of

the PCB. Avoid the use of vias on the decoupling

circuit.

Quartz Crystal

The ICS271 VCXO function consists of the external

crystal and the integrated VCXO oscillator circuit. To

assure the best system performance (frequency pull

range) and reliability, a crystal device with the

recommended parameters (shown below) must be

used, and the layout guidelines discussed in the

following section shown must be followed.

The frequency of oscillation of a quartz crystal is

determined by its “cut” and by the load capacitors

connected to it. The ICS271 incorporates on-chip

variable load capacitors that “pull” (change) the

frequency of the crystal. The crystal specified for use

with the ICS271 is designed to have zero frequency

error when the total of on-chip + stray capacitance is 14

pF.

Recommended Crystal Parameters:

±20 ppm

Temperature Stability

±30 ppm

Aging

±20 ppm

Load Capacitance

14 pf

Shunt Capacitance, C0

7 pF Max

C0/C1 Ratio

250 Max

Equivalent Series Resistance

35

Ω Max

The external crystal must be connected as close to the

chip as possible and should be on the same side of the

PCB as the ICS271. There should be no via’s between

the crystal pins and the X1 and X2 device pins. There

should be no signal traces underneath or close to the

crystal. See application note MAN05.

Crystal Tuning Load Capacitors

The crystal traces should include pads for small fixed

capacitors, one between X1 and ground, and another

between X2 and ground. Stuffing of these capacitors

on the PCB is optional. The need for these capacitors is

determined at system prototype evaluation, and is

influenced by the particular crystal used (manufacture

and frequency) and by PCB layout. The typical required

capacitor value is 1 to 4 pF.

To determine the need for and value of the crystal

adjustment capacitors, you will need a PC board of

your final layout, a frequency counter capable of about

1 ppm resolution and accuracy, two power supplies,

and some samples of the crystals which you plan to

use in production, along with measured initial accuracy

for each crystal at the specified crystal load

capacitance, CL.

To determine the value of the crystal capacitors:

1. Connect VDD of the ICS271 to 3.3 V. Connect pin 1

of the ICS271 to the second power supply. Adjust the

voltage on pin 1 to 0V. Measure and record the

frequency of the CLK output.

2. Adjust the voltage on pin 1 to 3.3 V. Measure and

record the frequency of the same output.

To calculate the centering error:

Where:

Error

10

6

x

f

3.0V

f

tet

arg

–

() f

0V

f

tet

arg

–

()

+

f

tet

arg

-----------------------------------------------------------------------

error

xtal

–

=