Quad PLL Field Programmable VersaClock Synthesizer

MDS 348 H

2

Revision 051705

Integrated Circuit Systems, Inc.

ICS348

Pin Assignment

Pin Descriptions

16

1

15

2

14

X1/ICLK

X2

3

13

S0

4

12

S1

VDD

5

11

CLK9

6

PDTS

7

VDD

8

GND

S2

VDD

GND

CLK1

CLK5

CLK2

CLK6

9

10

CLK3

CLK7

CLK4

CLK8

20

19

18

17

20-pin (150 mil) SSOP (QSOP)

Pin

Number

Pin

Name

Pin

Type

Pin Description

1

X1

XI

Crystal Input. Connect this pin to a crystal or external input clock.

2

S0

Input

Select pin 0. Internal pull-up resistor.

3

S1

Input

Select pin 1. Internal pull-up resistor.

4

CLK9

Output

Output clock 9. Weak internal pull-down when tri-state.

5VDD

Power

Connect to +3.3 V.

6

GND

Power

Connect to ground.

7

CLK1

Output

Output clock 1. Weak internal pull-down when tri-state.

8

CLK2

Output

Output clock 2. Weak internal pull-down when tri-state.

9

CLK3

Output

Output clock 3. Weak internal pull-down when tri-state.

10

CLK4

Output

Output clock 4. Weak internal pull-down when tri-state.

11

CLK8

Output

Output clock 8. Weak internal pull-down when tri-state.

12

CLK7

Output

Output clock 7. Weak internal pull-down when tri-state.

13

CLK6

Output

Output clock 6. Weak internal pull-down when tri-state.

14

CLK5

Output

Output clock 5. Weak internal pull-down when tri-state.

15

GND

Power

Connect to ground.

16

VDD

Power

Connect to +3.3 V.

17

S2

Input

Select pin 2. Internal pull-up resistor.

18

PDTS

Input

Power down tri-state. Powers down entire chip and tri-states clock outputs

when low. Internal pull-up resistor.

19

VDD

Power

Connect to +3.3 V.

20

X2

XO

Crystal Output. Connect this pin to a fundamental crystal. Float for clock input.