ICS348

MDS 348 H

1

Revision 051705

Integrated Circuit Systems, Inc.

Quad PLL Field Programmable VersaClock Synthesizer

Description

The ICS348 field programmable clock synthesizer

generates up to 9 high-quality, high-frequency clock

outputs including multiple reference clocks from a low

frequency crystal or clock input. The ICS348 has 4

independent on-chip PLLs and is designed to replace

crystals and crystal oscillators in most electronic

systems.

and outputs, the ICS348 contains a One-Time

Programmable (OTP) ROM to allow field

programmability. Programming features include eight

selectable configuration registers, up to two sets of four

low-skew outputs.

Using Phase-Locked Loop (PLL) techniques, the

device runs from a standard fundamental mode,

inexpensive crystal, or clock. It can replace multiple

crystals and oscillators, saving board space and cost.

The ICS348 is also available in factory programmed

custom versions for high-volume applications.

Features

output clocks, use the ICS342 (8-pin). For three

output clocks, use the ICS343 (8-pin). For more than

three outputs, use the ICS345 or ICS348.

Block Diagram

C rystal

O scillator

PLL1

GN D

2

3

VDD

PDT S

PLL2

PLL3

Divide

Logic

and

Output

Enable

Control

S2:S 0

CLK1

CLK9

CLK8

CLK7

CLK6

CLK5

CLK4

CLK3

CLK2

3

OT P

RO M

with

PLL

Values

PLL4

X2

Cry stal or

cloc k input

E xternal capacitors are

required w ith a crystal input.

X 1/IC LK