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ADUCM3027BCBZ-R7 数据表(PDF) 29 Page - Analog Devices

部件名 ADUCM3027BCBZ-R7
功能描述  Ultra Low Power Arm Cortex-M3 MCU with Integrated Power Management
PDF  39 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADUCM3027BCBZ-R7 数据表(HTML) 29 Page - Analog Devices

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Data Sheet
ADuCM3027/ADuCM3029
Rev. B | Page 29 of 39
DEVELOPMENT SUPPORT
Development support for the ADuCM3027/ADuCM3029 MCU
includes documentation, evaluation hardware, and
development software tools.
Documentation
The ADuCM302x Ultra Low Power ARM Cortex-M3 MCU
with Integrated Power Management Hardware Reference details
the functionality of each block on the ADuCM3027/ADuCM3029
MCUs. It includes power management, clocking, memories, and
peripherals.
Hardware
The EV-COG-AD3029LZ is available to prototype sensor
configurations with the ADuCM3027/ADuCM3029 MCUs.
Software
The EV-COG-AD3029LZ includes a complete development and
debug environment for the ADuCM3027/ADuCM3029 MCUs.
The device family pack (DFP) for the ADuCM3027/
ADuCM3029 is provided for the IAR Embedded Workbench
for ARM, Keil™, and CrossCore® embedded studio (CCES)
environments.
The DFP also includes operating system (OS) aware drivers and
example code for all the peripherals on the devices.
ADDITIONAL INFORMATION
The following documentation that describe the ADuCM3027/
ADuCM3029 MCUs can be ordered from any Analog Devices
sales office or accessed electronically on the Analog Devices
website:
ADuCM302x Ultra Low Power ARM Cortex-M3 MCU
with Integrated Power Management Hardware Reference.
This data sheet describes the ARM Cortex-M3 core and
memory architecture used on the ADuCM3027/ADuCM3029
MCUs but does not provide detailed programming information
for the ARM processor. For more information about
programming the ARM processor, visit the ARM Infocenter
web page.
The applicable documentation for programming the ARM
Cortex-M3 processor include the following:
ARM Cortex-M3 Devices Generic User Guide
ARM Cortex-M3 Technical Reference Manual
REFERENCE DESIGNS
The Circuits from the Lab® page provides the following for the
ADuCM3027/ADuCM3029 reference design:
Graphical circuit block diagram presentation of signal
chains for a variety of circuit types and applications
Drill down links for components in each chain to selection
guides and application information
Reference designs applying best practice design techniques
MCU TEST CONDITIONS
The ac signal specifications (timing parameters) appearing in
this data sheet include output disable time, output enable time,
and others. Timing is measured on signals when they cross the
voltage threshold (VMEAS) level as described in Figure 24. All
delays (in nanoseconds or microseconds) are measured between
the point that the first signal reaches VMEAS and the point that
the second signal reaches VMEAS. The value of VMEAS is set to
VBAT/2. The tester pin electronics is shown in Figure 25.
INPUT
OR
OUTPUT
VMEAS
VMEAS
Figure 24. Voltage Reference Levels for AC Measurements (Except Output
Enable/Disable)
VLOAD
50Ω
70Ω
45Ω
ZO = 50Ω (IMPEDANCE)
TD = 4.04ns ± 1.18ns
50Ω
400Ω
2pF
0.5pF
4pF
DUT
OUTPUT
T1
NOTES
1. THE WORST-CASE TRANSMISSION LINE DELAY (TD) IS SHOWN AND
CAN BE USED FOR THE OUTPUT TIMING ANALYSIS TO REFLECT THE
TRANSMISSION LINE EFFECT AND MUST BE CONSIDERED.
TRANSMISSION LINE IS FOR LOAD ONLY AND DOES NOT AFFECT
THE DATA SHEET TIMING SPECIFICATIONS.
2. ANALOG DEVICES RECOMMENDS USING THE IBIS MODEL TIMING
FOR A GIVEN SYSTEM REQUIREMENT. IF NECESSARY, A SYSTEM
CAN INCORPORATE EXTERNAL DRIVERS TO COMPENSATE FOR
ANY TIMING DIFFERENCES.
Figure 25. Equivalent Device Loading for AC Measurements
(Includes All Fixtures)
DRIVER TYPES
Table 24 shows the driver types.
Table 24. Driver Types
Driver Type1, 2, 3
Associated Pins
Type A
P0_00 to P0_03, P0_07, P0_10 to P0_13,
P0_15, P1_00 to P1_10, P1_15, P2_00, P2_01,
P2_04 to P2_14, P3_00 to P3_03, and
SYS_HWRST.
Type B
P0_08, P0_09, P0_14, P1_11 to P1_14, and
P2_02
Type C
P0_04 and P0_05
Type D
P0_06
1 In single drive mode, the maximum source/sink capacity is 2 mA.
2 In double drive mode, the maximum source/sink capacity is 4 mA.
3 At maximum drive capacity, only 16 GPIOs are allowed to switch at any
given point of time.



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