PIC16F684-ESLASHP datasheet(79/164 Pages) MICROCHIP

79 / 164 page

 2004 Microchip Technology Inc.

Preliminary

DS41202C-page 77

PIC16F684

11.2

Compare Mode

In Compare mode, the 16-bit CCPR1 register value is

constantly compared against the TMR1 register pair

value. When a match occurs, the RC5/CCP1/P1A pin

is:

• Driven high

•Driven low

• Remains unchanged

The action on the pin is based on the value of control

bits, CCP1M<3:0> (CCP1CON<3:0>). At the same

time, interrupt flag bit, CCP1IF (PIR1<5>), is set.

FIGURE 11-2:

COMPARE MODE

OPERATION BLOCK

DIAGRAM

11.2.1

CCP1 PIN CONFIGURATION

The user must configure the RC5/CCP1/P1A pin as an

output by clearing the TRISC<5> bit.

11.2.2

TIMER1 MODE SELECTION

Timer1 must be running in Timer mode or Synchro-

nized Counter mode if the ECCP module is using the

compare feature. In Asynchronous Counter mode, the

compare operation may not work.

11.2.3

SOFTWARE INTERRUPT MODE

When Generate Software Interrupt mode is chosen

(CCP1M<3:0> = 1010), the CCP1 pin is not affected.

The CCP1IF (PIR1<5>) bit is set, causing a ECCP

interrupt (if enabled). See Register 11-1.

11.2.4

SPECIAL EVENT TRIGGER

In this mode (CCP1M<3:0> = 1011), an internal

hardware trigger is generated, which may be used to

initiate an action. See Register 11-1.

The special event trigger output of ECCP resets the

TMR1 register pair. This allows the CCPR1 register to

effectively be a 16-bit programmable period register for

Timer1. The special event trigger output also starts an

A/D conversion (if the A/D module is enabled).

TABLE 11-2:

REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, AND TIMER1

CCPR1H CCPR1L

TMR1H

TMR1L

Comparator

Output

Logic

Special Event Trigger

Set Flag bit CCP1IF

(PIR1<5>)

Match

RC5/CCP1/P1A

TRISC<5>

CCP1CON<3:0>

Mode Select

Output Enable

Special Event Trigger will:

•

clear TMR1H and TMR1L registers

•

NOT set interrupt flag bit TMR1F (PIR1<0>)

•

set the GO/DONE bit (ADCON0<1>)

Note:

Clearing the CCP1CON register will force

the RC5/CCP1/P1A compare output latch

to the default low level. This is not the

PORTC I/O data latch.

Note:

The special event trigger from the ECCP

module will not set interrupt flag bit

TMR1IF (PIR1<0>).

Addr

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOD

Value on

all other

Resets

0Bh/

8Bh

INTCON

GIE

PEIE

T0IE

INTE

RAIE

T0IF

INTF

RAIF

0000 0000 0000 0000

0Ch

PIR1

EEIF

ADIF

CCP1IF

C2IF

C1IF

OSFIF

TMR2IF

TMR1IF 0000 0000 0000 0000

0Eh

TMR1L

Holding register for the Least Significant Byte of the 16-bit TMR1 register

xxxx xxxx uuuu uuuu

0Fh

TMR1H

Holding register for the Most Significant Byte of the 16-bit TMR1 register

xxxx xxxx uuuu uuuu

10h

T1CON

T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 uuuu uuuu

1Ah

CMCON1

—

—T1GSS

C2SYNC ---- --10 ---- --10

13h

CCPR1L

Capture/Compare/PWM Register 1 Low Byte

xxxx xxxx uuuu uuuu

14h

CCPR1H

Capture/Compare/PWM Register 1 High Byte

xxxx xxxx uuuu uuuu

15h

CCP1CON

P1M1

P1M0

DC1B1

DC1B0

CCP1M3

CCP1M2 CCP1M1 CCP1M0 0000 0000 0000 0000

87h

TRISC

—

—TRISC5

TRISC4

TRISC3

TRISC2

TRISC1

TRISC0

--11 1111 --11 1111

8Ch

PIE1

EEIE

ADIE

CCP1IE

C2IE

C1IE

OSFIE

TMR2IE

TMR1IE 0000 0000 0000 0000

Legend: — = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Capture,

Compare or Timer1 module.

PIC16F684-E/P 数据表(PDF) 79 Page - Microchip Technology

PIC16F684-E/P 数据表(HTML) 79 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

PIC16F684-E/P 数据表(PDF) 79 Page - Microchip Technology

PIC16F684-E/P 数据表(HTML) 79 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载